參數(shù)資料
型號: MC68HC05F4FB
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 1.789 MHz, MICROCONTROLLER, PQFP44
封裝: QFP-44
文件頁數(shù): 130/130頁
文件大?。?/td> 2089K
代理商: MC68HC05F4FB
MC68HC05F4
MOTOROLA
10-3
ELECTRICAL SPECIFICATIONS
10
10.3
DC electrical characteristics
(1) Typical values are at midpoint of voltage range and at 25
°C only.
(2) All IDD measurements taken with suitable decoupling capacitors across the power supply to suppress the
transient switching currents inherent in CMOS designs. RUN and WAIT IDD: measured using an external
square-wave clock source (fOSC = 3.58 MHz); all inputs0.2V from rail; no DC loads; maximum load on outputs
50pF (20pF on OSC2). WAIT IDD: only the timer system and DMG active; current varies linearly with the OSC2
capacitance. STOP and WAIT IDD: all ports congured as inputs, VIL = 0.2 V, VIH = VDD 0.2 V. STOP IDD:
measured with OSC1 = VSS.
Table 10-3 DC electrical characteristics (VDD = 5.0 V)
(VDD = 5.0VDC ± 10%, VSS = 0 VDC, T = 40°C to 85°C, unless otherwise stated)
Characteristic
Symbol
Min.
Typ.(1)
Max.
Unit
Output voltage
ILOAD = 10 A
ILOAD = +10 A
VOH
VOL
VDD 0.1
0.1
V
Output high voltage (ILOAD = 0.8 mA)
Ports (PA07, PB27, PC07)
VOH
VDD 0.8
V
Output low voltage (ILOAD = +1.6 mA)
Ports(PA07, PB07, PC07, PD07)
TCMP12
VOL
0.4
V
Input high voltage
Ports (PA07, PB07, PC07, PD07)
IRQ, RESET,OSC1, TCAP12
VIH
0.7VDD
VDD
V
Input low voltage
Ports (PA07, PB07, PC07, PD07)
IRQ
, RESET, OSC1, TCAP12
VIL
VSS
0.2VDD
V
Supply Current(2)
RUN
WAIT
STOP
IDD
2.5
0.8
5
1.2
80
mA
A
I/O ports hi-Z leakage current
Ports (PA07, PB07, PC07, PD07)
IOZ
10
A
Input current
RESET, IRQ, OSC1, TCAP12
IIN
1
A
Capacitance
Ports (as input or output)
RESET, IRQ
COUT
CIN
12
8
pF
Input current low, VIN = 0V
Ports (PA07, PB23, PC07), RESET
Input current high, VIN = VDD
PB47
IIL
IIH
30
30
90
90
170
170
A
TPG
95
05F4Book Page 3 Tuesday, August 5, 1997 1:10 pm
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