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參數(shù)資料
| 型號(hào)： | MC68HC05F4FB |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 1.789 MHz, MICROCONTROLLER, PQFP44 |
| 封裝： | QFP-44 |
| 文件頁數(shù)： | 64/130頁 |
| 文件大小： | 2089K |
| 代理商： | MC68HC05F4FB |
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MC68HC05F4
MOTOROLA
4-1
PARALLEL INPUT/OUTPUT PORTS
4
PARALLEL INPUT/OUTPUT PORTS
The MC68HC05F4 has a total of 32 I/O lines, arranged as four 8-bit ports. The I/O lines are
individually programmable as either input or output, under the software control of the data
direction registers. Port A can also be congured to respond to keyboard interrupts.
To avoid glitches on the output pins, data should be written to the I/O port data register before
writing ones to the corresponding data direction register bits to set the pins in output mode.
4.1
Input/output programming
The bidirectional port lines may be programmed as inputs or outputs under software control. The
direction of each pin is determined by the state of the corresponding bit in the port data direction
register (DDR). Each I/O port has an associated DDR. Any I/O port pin is congured as an output
if its corresponding DDR bit is set to a logic one. A pin is congured as an input if its corresponding
DDR bit is cleared.
At power-on or reset, all DDRs are cleared, thus conguring all port pins as inputs. The data
direction registers can be written to or read by the MCU. During the programmed output state, a
read of the data register actually reads the value of the output data latch and not the I/O pin. The
operation of the standard port hardware is shown schematically in Figure 4-2.
This is further summarized in Table 4-1, which shows the effect of reading from, or writing to an
I/O pin in various circumstances. Note that the read/write signal shown is internal and not available
to the user.
TPG
35
05F4Book Page 1 Tuesday, August 5, 1997 1:10 pm
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