參數(shù)資料
型號(hào): MC68HC05F4FB
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 1.789 MHz, MICROCONTROLLER, PQFP44
封裝: QFP-44
文件頁數(shù): 47/130頁
文件大?。?/td> 2089K
代理商: MC68HC05F4FB
MC68HC05F4
MOTOROLA
2-1
MODES OF OPERATION AND PIN DESCRIPTIONS
2
MODES OF OPERATION AND PIN
DESCRIPTIONS
The normal operating mode of the MC68HC05F4 is single chip mode. There is also a bootloader
mode, primarily for factory test purposes. In addition to these modes, there are three low power
modes which may be entered and exited at will from user mode: STOP, WAIT and data retention.
2.1
Single-chip mode
This is the normal user operating mode, in which the device functions as a self-contained
microcomputer unit, with all on-board peripherals and I/O ports available to the user. All address
and data activity occurs within the MCU.
2.2
Low power modes
2.2.1
STOP mode
The STOP instruction places the MCU in its lowest power consumption mode. In STOP mode, the
internal oscillator is turned off, halting all internal processing, including timer (and COP watchdog
timer) operation.
During STOP mode, the core timer interrupt ags (CTOF and RTIF) and interrupt enable bits
(TOFE and RTIE) in the CTCSR, as well as the 16-bit timer ags in register TSR and interrupt
enable bits in register TCR, are cleared by internal hardware. The I-bit in the CCR is cleared to
enable external interrupts. All other registers, the remaining bits in the CTCSR, and memory
contents remain unaltered. All input/output lines remain unchanged. The processor can be
brought out of STOP mode only by an interrupt (IRQ, Keyboard, LVI) if enabled or RESET
(external reset or low voltage reset – LVR). See Figure 2-1.
The STOP instruction can be disables by a mask option. When disabled, the STOP instruction is
executed as a NOP.
TPG
19
05F4Book Page 1 Tuesday, August 5, 1997 1:10 pm
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