參數(shù)資料
型號(hào): MC68HC05F4FB
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 1.789 MHz, MICROCONTROLLER, PQFP44
封裝: QFP-44
文件頁(yè)數(shù): 68/130頁(yè)
文件大?。?/td> 2089K
代理商: MC68HC05F4FB
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MOTOROLA
4-4
MC68HC05F4
PARALLEL INPUT/OUTPUT PORTS
4
KIE — keyboard interrupt enable
1 (set)
Keyboard interrupt and ag setting enabled.
0 (clear) –
Keyboard interrupt and ag setting disabled.
An interrupt can only be generated if KIE and KF are both set and the I-bit in the CCR is clear.
4.3
Port B
Port B is an 8-bit bidirectional port which does not share any of its pins with other subsystems.
The lines PB0 and PB1 have open drain outputs, PB2 and PB3 have internal pull-up resistors and
lines PB4–PB7 have internal pull-down resistors.
Reset does not affect the state of the data register, but clears the data direction register, thereby
returning all port pins to input mode. Writing a ‘1’ to any DDR bit sets the corresponding port pin
to output mode.
Figure 4-2 Standard I/O port structure
Table 4-1 I/O pin states
R/W
DDRn
Action of MCU write to/read of data bit
0
The I/O pin is in input mode. Data is written into the output data latch.
0
1
Data is written into the output data latch, and output to the I/O pin.
1
0
The state of the I/O pin is read.
1
The I/O pin is in output mode. The output data latch is read.
Data direction
register bit
Latched data
register bit
DDRn
DATA
Input
buffer
Output
buffer
O/P
data
buffer
M68HC05
inter
nal
connections
DDRn
DATA
I/O
100
111
0
tristate
0
1
tristate
I/O
pin
Output
Input
TPG
38
05F4Book Page 4 Tuesday, August 5, 1997 1:10 pm
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