參數(shù)資料
型號: MC68HC05L25PB
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQFP52
封裝: TQFP-52
文件頁數(shù): 127/152頁
文件大?。?/td> 897K
代理商: MC68HC05L25PB
Oscillators and Clock
MC68HC05L25 Data Sheet, Rev. 3.1
76
Freescale Semiconductor
8.4 OSC and XOSC
The secondary oscillator (XOSC) runs continuously after power-up. The main oscillator (OSC) can be
stopped to conserve power via the STOP instruction or clearing the FOSCE bit in the MISC register. The
effects of restarting the OSC will vary depending on the current state of the MCU, including SYS0–SYS1
and FOSCE bits.
NOTE
Do not switch the system clock to XOSC (SYS1–SYS0 = 11) when XOSC
clock is not available. XOSC clock is available when STUP flag is set.
Do not switch the system clock to OSC (SYS1–SYS0 = 00, 01, or 10) when
OSC clock is not available. OSC clock is available when FTUP flag is set.
8.5 OSC On Line
If the system clock is OSC, FOSCE should remain set. Executing the STOP instruction in this condition
will halt OSC, put the MCU into a low-power mode and clear the 6-bit POR counter. The 7-bit divider is
not initialized. Exiting STOP with external IRQ or RESET re-starts the oscillator. When the POR counter
overflows, internal reset is released and execution can begin. The stabilization time will vary between
8064 and 8192 counts.
NOTE
Exiting STOP with external IRQ will always return the MCU to the state as
defined by the register definitions prior to executing the STOP instruction.
Figure 8-1. OSC1, OSC2, XOSC1, and XOSC2 Mask Options
8.6 XOSC On Line
If XOSC is the system clock (SYS0–SYS1 = 1–1), OSC can be stopped either by the STOP instruction or
by clearing the FOSCE bit.
The suboscillator (XOSC) never stops except during powerdown. This clock can also be used as the clock
source of the system clock and time base.
Rxf
Rf
Rxd
XOSC1
XOSC2
XOSC
OSC1
OSC2
OSC
ON CHIP
OFF CHIP
MASK
OPTION
MASK
OPTION
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