參數(shù)資料
型號(hào)： MC68HC05L25PB
廠商： FREESCALE SEMICONDUCTOR INC
元件分類(lèi)： 微控制器/微處理器
英文描述： 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQFP52
封裝： TQFP-52
文件頁(yè)數(shù)： 89/152頁(yè)
文件大?。?/td> 897K
代理商： MC68HC05L25PB
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MC68HC05L25 Data Sheet, Rev. 3.1
Freescale Semiconductor
41
Chapter 6
Interrupts
6.1 Introduction
The MCU can be interrupted in these ways:
1.
Nonmaskable software interrupt instruction (SWI)
2.
External interrupt via IRQ (IRQ)
3.
Serial peripheral interface interrupt (SPII)
4.
Internal time base interrupt (TBI)
5.
Key wakeup interrupt (KWI)
6.
Event counter overflow interrupt (EVOF)
6.2 CPU Interrupt Processing
Interrupts cause the processor to save register contents on the stack and to set the interrupt mask (I bit)
to prevent additional interrupts. Unlike reset, hardware interrupts do not cause the current instruction
execution to be halted, but are considered pending until the current instruction is complete.
If interrupts are not masked (I bit in the CCR is clear) and the corresponding interrupt enable bit is set, the
processor will proceed with interrupt processing. Otherwise, the next instruction is fetched and executed.
If an interrupt occurs, the processor completes the current instruction, then stacks the current CPU
register states, sets the I bit to inhibit further interrupts, and finally checks the pending hardware interrupts.
If more than one interrupt is pending after the stacking operation, the interrupt with the highest vector
location shown in Table 6-1 will be serviced first. The SWI is executed in the same way as any other
instruction, regardless of the I bit state.
When an interrupt is to be processed, the CPU fetches the address of the appropriate interrupt software
service routine from the vector table at locations $1FF0 through $1FFF as defined in Table 6-1.
Table 6-1. Vector Address for Interrupts and Reset
Regist
er
Flag
Name
Interrupts
CPU
Interrupt
Vector
Address
N/A
Reset
RESET
$1FFE:$1FFF
N/A
Software
SWI
$1FFC:$1FFD
INTCR
IRQF
External Interrupt
IRQ
$1FFA:$1FFB
KWIEN
KWIF
Key Wakeup
KWI
$1FF8:$1FF9
—
Reserved
—
$1FF6:$1FF7
EVSC
R
ECOF
Event Counter
EVI
$1FF4:$1FF5
SPSR
SPIF
Serial Peripheral
SPII
$1FF2:$1FF3
TBCR2
TBIF
Time Base Periodical
TBI
$1FF0:$1FF1
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