參數資料
型號: MC68HC05L25PB
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQFP52
封裝: TQFP-52
文件頁數: 152/152頁
文件大小: 897K
代理商: MC68HC05L25PB
MC68HC05L25 Data Sheet, Rev. 3.1
Freescale Semiconductor
99
Chapter 11
LCD Driver
11.1 Introduction
The MC68HC05L25 has 25 or 24 frontplane (FP) and three or four backplane (BP) drivers. The number
of drivers for the FP and BP can be selected by software option. The maximum number of segments
configurable is either 24 x 4 = 96 or 25 x 3 = 75 segments.
The MC68HC05L25 uses a 1/3 biasing method. The bias voltages are supplied from an external source
using the VLCD pin. Voltages VLCD1, VLCD2, and VLCD3 are generated internally with resistor divider.
There are 11 bytes of data latch for selection (turned on) or nonselection (turned off) of segments. Each
byte consists of two FP drivers and either three or four BP drivers depending on the duty configured. The
data latch is available in memory locations $21 through $2D and can be accessed by the CPU using the
conventional memory access method (LOAD, STORE, BIT operations, etc.).
The clock which forms the LCD FP and BP waveforms is supplied by the time base module.
11.2 Block Diagram
Figure 11-1 illustrates the block diagram of the LCD module.
Figure 11-1. LCD Block Diagram
FP4
FP3
FP2
FP1
BP3/FP0
BP2
BP1
BP0
VLCD
LCD FRONTPLANE DRIVER + DATA LATCH
PORTB
PB7/FP17
PB6/FP18
PB5/FP19
PB4/FP20
PB3/FP21
PB2/FP22
PB1/FP23
PB0/FP24
BACK
P
LANE
DRIVE
R
LCDE (LCDC)
STATE
CONTROL
1/4
1/3
1/4
FP5
FP6
FP7
FP8
FP9
FP1
0
FP1
1
FP1
2
FP1
3
FP1
4
FP1
5
FP1
6
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