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參數(shù)資料
| 型號： | MC68HC58DW |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 1 CHANNEL(S), LOCAL AREA NETWORK CONTROLLER, PDSO28 |
| 封裝： | SOIC-28 |
| 文件頁數(shù)： | 50/102頁 |
| 文件大?。?/td> | 700K |
| 代理商： | MC68HC58DW |
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MC68HC58
DATA LINK CONTROLLER OPERATION
MOTOROLA
TECHNICAL DATA
4-7
The host MCU can read only the status byte, or can read the status byte followed by
a read of a data byte (the data read automatically flushes the associated data byte
from the RxFIFO buffer). There is no specified maximum time between reading of a
status byte and reading of a data byte, but correct status of the RxFIFO is guaranteed
only for 1
s.
The DLC allows a host to write contiguous frame bytes to the TxFIFO buffer without
intervening command bytes, provided that the first and last data bytes are accompa-
nied by “l(fā)oad as first byte of transmit data”, “l(fā)oad as last byte of transmit data”, or “l(fā)oad
as first and last byte of transmit data” command bytes. A data, configuration, or null
byte need not immediately follow the associated command, but must be the next byte
transferred to the DLC. The command byte is acted upon when the subsequent byte
is written into the DLC.
4.2.1.3 Minimum Time Requirements
Minimum time constraints appear on certain sequences of operations. Table 4-2
shows the minimum time required between these operations. The left column shows
initial operations; the top row, subsequent operations.
4.2.1.4 Motorola Microcontroller Data Transfers
Many Motorola microcontroller families, including the M68HC11, M68HC16, and
M68300 series MCUs, can generate synchronous ADDR0, DATA, CLK and R/W sig-
nals.
For example, host MCUs based on M68HC11 microcontrollers can use instructions
that load 16-bit double accumulator D from two consecutive byte addresses (LDD),
and store accumulator content into two consecutive byte addresses (STD).
Host MCUs based on M68HC16 and M68300 microcontrollers can use the dynamic
bus sizing capability to automate the transfer of 16-bit data to and from an 8-bit port.
NOTES:
1. During block transfers only.
2. Status valid for 1
s
Table 4-2 Minimum Time Between Operations
Write
Command
Write
Data/Config
Read
Status
Read
Data
Write
Command
Not allowed
0
Not allowed
Write
Data/Config
3
s
3
s1
3
s
Not allowed
Read
Status
0
Not allowed
02
0
Read
Data
3
s
Not allowed
0
Not allowed
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