參數(shù)資料
型號: MC68HC58FN
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 1 CHANNEL(S), LOCAL AREA NETWORK CONTROLLER, PQCC28
封裝: PLASTIC, LCC-28
文件頁數(shù): 21/102頁
文件大?。?/td> 700K
代理商: MC68HC58FN
MC68HC58
SIGNAL AND PIN DESCRIPTIONS
MOTOROLA
TECHNICAL DATA
2-9
2.2.1.12 SCLK — Serial Clock
This pin is used to input a serial clock signal to the DLC SPI. This signal is generated
by the SPI bus master device (typically the MCU).
2.2.1.13 SIMO — Slave In Master Out
The SPI interface performs simultaneous bidirectional transfers initiated by a bus mas-
ter. This pin connects the serial data input from the SPI bus to the DLC (the DLC is an
SPI slave device).
2.2.1.14 SOMI — Slave Out Master In
The SPI performs simultaneous bidirectional transfers initiated by a bus master. This
pin connects the serial data output from the DLC to the SPI bus (the DLC is an SPI
slave device).
2.2.1.15 V
BATT — Battery Voltage
This pin connects a separate switched or unswitched 12 Vdc power supply to the DLC
bus transceiver. This supply should be well regulated and protected against switching
transients.
2.2.1.16 V
CC — Analog Power Supply Voltage
This pin connects a nominal 5 Vdc power supply to the analog transceiver circuitry in
the DLC. For maximum noise immunity, V
CC supply path should be separate from VDD
supply path.
2.2.1.17 V
DD — Digital Power Supply Voltage
This pin connects a nominal 5 Vdc power supply to the digital control circuitry in the
DLC. For maximum noise immunity, the V
DD supply path should be separate from VCC
supply path.
2.2.1.18 V
SSA — Analog Power Ground
This pin provides the analog power ground connection to the DLC. Loss of analog
ground directly affects operation of the LOAD pin. For best noise immunity in opera-
tion, the V
SSA ground path should be separate from the VSSD ground path.
2.2.1.19 V
SSD — Digital Power Ground
This pin provides the digital power ground connection to the DLC. For best noise im-
munity in operation, the V
SSD ground path should be separate from the VSSA ground
path.
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