參數(shù)資料
型號(hào): MCIMX27
廠商: 飛思卡爾半導(dǎo)體(中國)有限公司
英文描述: Multimedia Applications Processor(多媒體應(yīng)用處理器)
中文描述: 多媒體應(yīng)用處理器(多媒體應(yīng)用處理器)
文件頁數(shù): 104/118頁
文件大?。?/td> 1159K
代理商: MCIMX27
i.MX27 Data Sheet, Advance Information, Rev. 0.1
104
Preliminary—Subject to Change Without Notice
Freescale Semiconductor
Package Information and Pinout
4.2
Table 58
identifies the pin assignments for the ball grid array (BGA) for full package. The connections of
these pins depend solely upon the user application, however there are a few factory test signals that are
not used in a normal application. Following is a list of these signals and how they are to be terminated for
proper operation of the i.MX27 processor:
CLKMODE[1:0]: To ensure proper operation, leave these signals as no connects.
OSC26M_TEST: To ensure proper operation, leave this signal as no connect.
EXT_60M: To ensure proper operation, connect this signal to ground.
EXT_266M: To ensure proper operation, connect this signal to ground.
Most of the signals shown in
Table 58
are multiplexed with other signals. For ease of reference, all
of the signals at a particular pad are shown in the form of a compound signal name. Please refer to
Table 3
for complete information on the signal multiplexing schemes of these signals.
Pin Assignments
Table 58
shows the device pin list, sorted by signal identification, including pad locations for ground and
power supply voltages.
Table 58. i.MX27 24 x 24 BGA (Signal ID by Ball Grid Location)
Pin Name
Ball Grid
Location
A0
Y1
A1
T6
A10
AC12
A11
U2
A12
P6
A13
U1
A14
AB9
A15
Y11
A16
W11
A17
AC7
A18
AC6
A19
V8
A2
W2
A20
Y6
A21
AB4
A22
AC3
A23
AB1
A24
AA2
A25
U6
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