參數(shù)資料
型號(hào): MCIMX27
廠商: 飛思卡爾半導(dǎo)體(中國(guó))有限公司
英文描述: Multimedia Applications Processor(多媒體應(yīng)用處理器)
中文描述: 多媒體應(yīng)用處理器(多媒體應(yīng)用處理器)
文件頁(yè)數(shù): 32/118頁(yè)
文件大?。?/td> 1159K
代理商: MCIMX27
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i.MX27 Data Sheet, Advance Information, Rev. 0.1
32
Preliminary—Subject to Change Without Notice
Freescale Semiconductor
Signal Descriptions
CSPI1_SS[2:0]
Slave Select (Selectable polarity) signal, the CSPI1_SS2 is multiplexed with
USBH2_DATA5/RCV; and CSPI1_SS1 is multiplexed with EXT_DMAGRANT; PD26–28.
CSPI1_SCLK
Serial Clock signal, PD29
CSPI1_RDY
Serial Data Ready signal, shared with Ext_DMAReq_B signal; PD25
CSPI2_MOSI
Master Out/Slave In signal, multiplexed with USBH2_DATA1/TXDP; PD24
CSPI2_MISO
Master In/Slave Out signal, multiplexed with USBH2_DATA2/TXDm; PD23
CSPI2_SS[2:0]
Slave Select (Selectable polarity) signals, multiplexed with USBH2_DATA4/RXDM,
USBH2_DATA3/RXDP, USBH2_DATA6/SPEED; PD19–PD21
CSPI2_SCLK
Serial Clock signal, multiplexed with USBH2_DATA0/OEn; PD22
Note:
CSPI3 CSPI3_MOSI, CSPI3_MISO, CSPI3_SS, andCSPI3_SCLK are multiplexed with SD1 signals.
I
2
C
I2C2_SCL
I
2
C2 Clock, through GPIO, multiplexed with SLCDC_data8; PC6
I2C2_SDA
I
2
C2 Data, through GPIO, multiplexed with SLCDC_data7; PC5
I2C_CLK
I
2
C1 Clock; PD18
I2C_DATA
I
2
C1 Data; PD17
CMOS Sensor Interface
CSI_HSYNC
Sensor port horizontal sync, multiplexed with UART5_RTSP; PB21
CSI_VSYNC
Sensor port vertical sync, multiplexed with UART5_CTS; PB20
CSI_D7
Sensor port data, multiplexed with UART5_RXD; PB19
CSI_D6
Sensor port data, multiplexed with UART5_TXD; PB18
CSI_D5
Sensor port data; PB17
CSI_PIXCLK
Sensor port data latch clock; PB16
CSI_MCLK
Sensor port master clock, PB15
CSI_D4
Sensor port data, PD14
CSI_D3
Sensor port data, multiplexed with UART6_RTS; PB13
CSI_D2
Sensor port data, multiplexed with UART6_CTS; PB12
CSI_D1
Sensor port data, multiplexed with UART6_RXD; PB11
CSI_D0
Sensor port data, multiplexed with UART6_TXD; PB10
Serial Audio Port—SSI (Configurable to I2S Protocol and AC97) (2 to 4)
SSI1_CLK
Serial clock signal that is output in master or input in slave; PC23
SSI1_TXD
Transmit serial data; PC22
SSI1_RXD
Receive serial data; PC21
SSI1_FS
Frame Sync signal that is output in master and input in slave; PC20
Table 3. i.MX27 Signal Descriptions (continued)
Pad Name
Function/Notes
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MCIMX27_08 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Multimedia Applications Processor
MCIMX27ADSE 功能描述:開(kāi)發(fā)板和工具包 - ARM I.MX27 ADS RoHS:否 制造商:Arduino 產(chǎn)品:Development Boards 工具用于評(píng)估:ATSAM3X8EA-AU 核心:ARM Cortex M3 接口類型:DAC, ICSP, JTAG, UART, USB 工作電源電壓:3.3 V
MCIMX27ADSE 制造商:Freescale Semiconductor 功能描述:Development Kit
MCIMX27EC 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Multimedia Applications Processor
MCIMX27IPCAM 功能描述:視頻 IC 開(kāi)發(fā)工具 I.MX27 IP CAMERA REF RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Boards 類型:YPbPr to RGBHV Converters 工具用于評(píng)估:LMH1251 工作電源電壓:5 V