參數(shù)資料
型號： MCIMX537CVV8C
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 32-BIT, 800 MHz, RISC PROCESSOR, PBGA529
封裝： 19 X 19 MM, 0.80 MM PITCH, ROHS COMPLIANT, PLASTIC, TEPBGA-529
文件頁數(shù)： 94/172頁
文件大?。?/td> 4562K
代理商： MCIMX537CVV8C
i.MX53 Applications Processors for Industrial Products, Rev. 3
28
Freescale Semiconductor
Electrical Characteristics
4.3.2
LPDDR2 I/O DC Parameters
The LPDDR2 I/O pads support DDR2/LVDDR2, LPDDR2, and DDR3 operational modes.
4.3.2.1
DDR2 Mode I/O DC Parameters
The DDR2 interface fully complies with JESD79-2E DDR2 JEDEC standard release April, 2008. The
parameters in Table 11 are guaranteed per the operating ranges in Table 6, unless otherwise noted.
Low-level output current
(1.65-3.1V OVDD)
Iol
Vout = 0.2
×OVDD
Low drive
Medium drive
High drive
Max drive
2.1
4.2
6.3
8.4
——
mA
High-Level DC input voltage1, 2
VIH
—
0.7
× OVDD
—
OVDD
V
Low-Level DC input voltage1, 2
VIL
—
0
—
0.3
× OVDD
V
Input Hysteresis
VHYS
OVDD = 1.875 V
OVDD = 2.775 V
0.25
0.34
0.45
—V
Schmitt trigger VT+2, 3
VT+
—
0.5
× OVDD
—
V
Schmitt trigger VT–2, 3
VT–
—
0.5
× OVDD
V
Input current (no pull-up/down)
Iin
Vin = OVDD or 0
—
2
μA
Input current (22 k
Ω Pull-up)
Iin
Vin = 0 V
Vin = OVDD
——
161
2
μA
Input current (47 k
Ω Pull-up)
Iin
Vin = 0 V
Vin = OVDD
——
76
2
μA
Input current (100 k
Ω Pull-up)
Iin
Vin = 0 V
Vin= OVDD
——
36
2
μA
Input current (100 k
Ω Pull-down)
Iin
Vin = 0 V
Vin = OVDD
——
2
36
μA
Keeper Circuit Resistance
—
1304
—k
Ω
1 Overshoot and undershoot conditions (transitions above OVDD and below GND) on switching pads must be held below 0.6 V,
and the duration of the overshoot/undershoot must not exceed 10% of the system clock cycle. Overshoot/ undershoot must be
controlled through printed circuit board layout, transmission line impedance matching, signal line termination, or other
methods. Non-compliance to this specification may affect device reliability or cause permanent damage to the device.
2 To maintain a valid level, the transition edge of the input must sustain a constant slew rate (monotonic) from the current DC
level through to the target DC level, VIL or VIH. Monotonic input transition time is from 0.1 ns to 1 s.
3 Hysteresis of 250 mV is guaranteed over all operating conditions when hysteresis is enabled.
4 Use an off-chip pull resistor of less than 60 k
Ω to override this keeper.
Table 10. GPIO I/O DC Electrical Characteristics (continued)
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MCIMX537CVV8C 制造商:Freescale Semiconductor 功能描述:IC 32-BIT MPU 800 MHZ 529-BGA
MCIMX537CVV8CR2 功能描述:處理器 - 專門應(yīng)用 iMX53 Rev 2.1 Indust RoHS:否 制造商:Freescale Semiconductor 類型:Multimedia Applications 核心:ARM Cortex A9 處理器系列:i.MX6 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:1 GHz 指令/數(shù)據(jù)緩存: 數(shù)據(jù) RAM 大小:128 KB 數(shù)據(jù) ROM 大小: 工作電源電壓: 最大工作溫度:+ 95 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MAPBGA-432
MCIMX538DZK1C 功能描述:處理器 - 專門應(yīng)用 I.MX53 2.1 POP RoHS:否 制造商:Freescale Semiconductor 類型:Multimedia Applications 核心:ARM Cortex A9 處理器系列:i.MX6 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:1 GHz 指令/數(shù)據(jù)緩存: 數(shù)據(jù) RAM 大小:128 KB 數(shù)據(jù) ROM 大小: 工作電源電壓: 最大工作溫度:+ 95 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MAPBGA-432
MCIMX53EVK 制造商:Freescale Semiconductor 功能描述:
MCIMX53-LVDS 制造商:Freescale Semiconductor 功能描述:I.MX53 XGA DISPLAY LVDS DEV BOARD 制造商:Freescale Semiconductor 功能描述:I.MX53, XGA DISPLAY, LVDS, DEV BOARD 制造商:Freescale Semiconductor 功能描述:I.MX53, XGA DISPLAY, LVDS CONNECTOR, DEV BOARD; Silicon Manufacturer:Freescale; Core Architecture:ARM; Core Sub-Architecture:Cortex-A8; Silicon Core Number:i.MX5; Silicon Family Name:i.MX53
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