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參數(shù)資料
| 型號： | MPC5200 |
| 廠商： | 飛思卡爾半導體(中國)有限公司 |
| 英文描述： | Hardware Specifications |
| 中文描述： | 硬件規(guī)格 |
| 文件頁數(shù)： | 10/80頁 |
| 文件大?。?/td> | 790K |
| 代理商： | MPC5200 |
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MPC5200 Data Sheet, Rev. 4
Electrical and Thermal Characteristics
Freescale Semiconductor
10
where N is the number of output pins switching in a group M, C is the capacitance per pin, VDD_IO is the
IO voltage swing, f is the switching frequency and PIOint is the power consumed by the unloaded IO stage.
The total power consumption of the MPC5200 processor must not exceed the value, which would cause
the maximum junction temperature to be exceeded.
Table 6. Power Dissipation
Core Power Supply (VDD_CORE)
SpecID
Mode
SYS_XTAL/XLB/PCI/IPG/CORE (MHz)
Unit
Notes
33/66/33/33/264
33/132/66/132/396
Typ
Typ
Operational
727.5
1080
mW
1
,
2
NOTES:
1
Typical core power is measured at VDD_CORE = 1.5 V, Tj = 25 C
2
Operational power is measured while running an entirely cache-resident program with floating-point
multiplication instructions in parallel with a continuous PCI transaction via BestComm.
3
Doze power is measured with the G2_LE core in Doze mode, the system oscillator, System PLL and Core PLL
are active, all other system modules are inactive
4
Nap power is measured with the G2_LE core in Nap mode, the stem oscillator, System PLL and Core PLL are
active, all other system modules are inactive
5
Sleep power is measured with the G2_LE core in Sleep mode, the stem oscillator, System PLL and Core PLL
are active, all other system modules are inactive
6
Deep-Sleep power is measured with the G2_LE core in Sleep mode, the stem oscillator, System PLL, Core PLL
and all other system modules are inactive
7
Typical PLL power is measured at SYS_PLL_AVDD = CORE_PLL_AVDD = 1.5 V, Tj = 25 C
8
IO power figures given in the table represent the worst case scenario. For the mem_io rail connected to 2.5V the
IO power is expected to be lower and bounded by the worst case with VDD_MEM_IO connected to 3.3V.
9
Unloaded typical I/O power is measured in Deep-Sleep mode at VDD_IO = VDD_MEM_IO
SDR
= 3.3 V, Tj = 25 C
D5.1
Doze
—
600
mW
1
,
3
D5.2
Nap
—
225
mW
1
,
4
D5.3
Sleep
—
225
mW
1
,
5
D5.4
Deep-Sleep
52.5
52.5
mW
1
,
6
D5.5
PLL Power Supplies (SYS_PLL_AVDD, CORE_PLL_AVDD)
Mode
Typ
Unit
Notes
Typical
2
mW
7
D5.6
Unloaded I/O Power Supplies (VDD_IO, VDD_MEM_IO
8
)
Mode
Typ
Unit
Notes
Typical
33
mW
9
D5.7
Ptotal
Pcore
P
analog
PIO
+
+
=
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MPC5200B | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:SDRAM/DDR Memory Controller |
| MPC5200B_08 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:SDRAM / DDR Memory Controller |
| MPC5200B_10 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:SDRAM/DDR Memory Controller |
| MPC5200BDS | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Technical Data |
| MPC5200BV400 | 功能描述:微處理器 - MPU 400MHz 760MIPS RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-324 |
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