參數(shù)資料
型號(hào): MPC5200
廠商: 飛思卡爾半導(dǎo)體(中國)有限公司
英文描述: Hardware Specifications
中文描述: 硬件規(guī)格
文件頁數(shù): 33/80頁
文件大?。?/td> 790K
代理商: MPC5200
Electrical and Thermal Characteristics
MPC5200 Data Sheet, Rev. 4
Freescale Semiconductor
33
Figure 14. Timing Diagram—MUXed Mode
3.3.8
ATA
The MPC5200 ATA Controller is completely software programmable. It can be programmed to operate
with ATA protocols using their respective timing, as described in the ANSI ATA-4 specification. The ATA
interface is completely asynchronous in nature. Signal relationships are based on specific fixed timing in
terms of timing units (nano seconds).
ATA data setup and hold times, with respect to Read/Write strobes, are software programmable inside the
ATA Controller. Data setup and hold times are implemented using counters. The counters count the
number of ATA clock cycles needed to meet the ANSI ATA-4 timing specifications. For details, see the
ANSI ATA-4 specification [5] and how to program an ATA Controller and ATA drive for different ATA
protocols and their respective timing. See the MPC5200 User Manual [1].
PCI CLK
AD[24:0] (wr)
CSx
RW
ALE
AD[30:28] (wr)
AD[26:25] (wr)
AD[31,27] (wr)
Address[7:31]
Bank[0:1] bits
TSIZ[0:2] bits
ACK
Data
Data tenure
Address tenure
TS
Data
Data
Data
AD[31:0] (rd)
Data
t4
t13
t5
t1
Address latch
t7
t6
t11
t9
t12
t10
t8
t2
t3
OE
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