參數(shù)資料
型號： MPC7457EC
廠商： 飛思卡爾半導體(中國)有限公司
英文描述： RISC Microprocessor Hardware Specifications
中文描述： RISC微處理器硬件規(guī)格
文件頁數(shù)： 12/68頁
文件大小： 1755K
代理商： MPC7457EC
MPC7457 RISC Microprocessor Hardware Specifications, Rev. 5
12
Freescale Semiconductor
Electrical and Thermal Characteristics
Table 4
provides the recommended operating conditions for the MPC7457.
Table 4. Recommended Operating Conditions
1
Table 3. Input Threshold Voltage Setting
BVSEL Signal
Processor Bus Input Threshold
is Relative to:
L3VSEL Signal
1
L3 Bus Input Threshold is
Relative to:
Notes
0
1.8 V
0
1.8 V
2, 3
HRESET
Not Available
HRESET
1.5 V
2, 4
HRESET
2.5 V
HRESET
2.5 V
2
1
2.5 V
1
2.5 V
2
Notes:
1.
2.
3.
4.
Not implemented on MPC7447.
Caution:
The input threshold selection must agree with the OV
DD
/GV
DD
voltages supplied. See notes in
Table 2
.
If used, pull-down resistors should be less than 250
.
Applicable to L3 bus interface only. HRESET is the inverse of HRESET.
Characteristic
Symbol
Recommended Value
Unit
Notes
Min
Max
Core supply voltage
V
DD
1.3 V ± 50 mV
V
PLL supply voltage
AV
DD
1.3 V ± 50 mV
V
2
Processor bus supply voltage
BVSEL = 0
OV
DD
1.8 V ± 5%
V
BVSEL = HRESET or OV
DD
OV
DD
2.5 V ± 5%
V
L3 bus supply voltage
L3VSEL = 0
GV
DD
1.8 V ± 5%
V
L3VSEL = HRESET or GV
DD
GV
DD
2.5 V ± 5%
V
L3VSEL = HRESET
GV
DD
1.5 V ± 5%
V
3
Input voltage
Processor bus
V
in
GND
OV
DD
V
L3 bus
V
in
GND
GV
DD
V
JTAG signals
V
in
GND
OV
DD
V
Die-junction temperature
T
j
0
105
°C
Notes:
1.
These are the recommended and tested operating conditions. Proper device operation outside of these conditions is not
guaranteed.
This voltage is the input to the filter discussed in
Section 9.2, “PLL Power Supply Filtering,”
and not necessarily the voltage
at the AV
DD
pin, which may be reduced from V
DD
by the filter.
HRESET is the inverse of HRESET.
2.
3.
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