參數(shù)資料
型號: MPC7457EC
廠商: 飛思卡爾半導(dǎo)體(中國)有限公司
英文描述: RISC Microprocessor Hardware Specifications
中文描述: RISC微處理器硬件規(guī)格
文件頁數(shù): 62/68頁
文件大?。?/td> 1755K
代理商: MPC7457EC
MPC7457 RISC Microprocessor Hardware Specifications, Rev. 5
62
Freescale Semiconductor
Document Revision History
3
Corrected numerous errors in lists of pins associated with t
KHOV
, t
KHOX
, t
IVKH
, and t
IXKH
in Table 9.
Added support for 1.5 V L3 interface voltage; issues fixed in Rev. 1.1.
Corrected typos in Table 12.
Added data to Table 2.
Clarified address bus pull-up resistor recommendations in Section 1.9.6.
Modified Table 9, Figure 5, and Figure 6 to more accurately show when the mode select inputs
(BMODE[0:1], L3VSEL, BVSEL) are sampled and AC timing requirements
Table 10: Added skew and jitter values.
Table 14: Added AC timing values.
Table 24: Updated to reflect past and current part numbers not fully covered by this document.
Table 6: Removed CV
IH
and CV
IL
; V
IH
and V
IL
for SYSCLK input is the same as for other input
signals, and is now noted accordingly in this table.
Table 7: Removed Doze mode power entry (but left footnote 4 for clarity); documentation change
only.
Nontechnical formatting
2
Added substrate capacitor information in Sections 1.8.3 and 1.8.6.
Increased minimum processor and VCO frequencies in Table 8 from 500 and 1000 MHz to 600 and
1200 MHz (respectively).
Corrected maximum processor frequency for 1300 MHz devices in Table 8 (changed from 1333 to
1300 MHz).
Added value for to t
L3CSKW1
Table 10.
Added L3OHCR information in Section 1.5.2.4.1.
Added values for t
CO
and t
ECI
to Table 11.
Added Note 8 to Table 13 and Note 6 to Table 14.
Changed resistor value in PLL filter in Figure 25 from 10
to 400
.
Added 867 MHz speed grade.
Corrected Product Code in Tables 22 and 23.
Added pull-up/pull-down recommendations for CKSTP_IN and PLL_CFG[0:4] to Section 1.9.6.
1.1
Nontechnical reformatting.
Table 22. Document Revision History (continued)
Revision
Number
Date
Substantive Change(s)
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