參數(shù)資料
型號: MSC8101VT1375F
廠商: Freescale Semiconductor
文件頁數(shù): 104/104頁
文件大?。?/td> 0K
描述: IC DSP 16BIT 250MHZ 332-FCPBGA
標準包裝: 90
系列: StarCore
類型: SC140 內(nèi)核
接口: 通信處理器模塊(CPM)
時鐘速率: 275MHz
非易失內(nèi)存: 外部
芯片上RAM: 512kB
電壓 - 輸入/輸出: 3.30V
電壓 - 核心: 1.60V
工作溫度: -40°C ~ 105°C
安裝類型: 表面貼裝
封裝/外殼: 332-BFBGA,F(xiàn)CPBGA
供應商設(shè)備封裝: 332-FCBGA(17x17)
包裝: 托盤
MSC8101 Technical Data, Rev. 19
Freescale Semiconductor
4-1
Design Considerations
4
This chapter includes design and layout guidelines for manufacturing boards using the MSC8102.
4.1 Thermal Design Considerations
The average chip-junction temperature, TJ, in °C can be obtained from the following:
TJ = TA + (PD θJA)
Equation 1
where
TA = ambient temperature °C
θ
JA = package thermal resistance, junction to ambient, °C/W
PD = PINT + PI/O in W
PINT = IDD × VDD in W—chip internal power
PI/O = power dissipation on output pins in W—user determined
The user should set TA and PD such that TJ does not exceed the maximum operating conditions. In case TJ is too
high, the user should either lower the ambient temperature or the power dissipation of the chip.
The input voltage must not exceed the I/O supply VDDH by more than 2.5 V at any time, including during power-on
reset. In turn, VDDH can exceed VDD/VCCSYN by more than 3.3 V during power-on reset, but for no more than 100 ms.
VDDH should not exceed VDD/VCCSYN by more than 2.1 V during normal operation. VDD/VCCSYN must not exceed
VDDH by more than 0.4 V at any time, including during power-on reset. Therefore the recommendation is to use
“bootstrap” diodes between the power rails, as shown in Figure 4-1.
Figure 4-1.
Bootstrap Diodes for Power-Up Sequencing
I/O Power
Core/PLL
Supply
MUR420
3.3 V (VDDH)
1.6 V (VDD/VCCSYN)
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