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參數(shù)資料
| 型號(hào)： | MSC8101VT1375F |
| 廠商： | Freescale Semiconductor |
| 文件頁(yè)數(shù)： | 4/104頁(yè) |
| 文件大小： | 0K |
| 描述： | IC DSP 16BIT 250MHZ 332-FCPBGA |
| 標(biāo)準(zhǔn)包裝： | 90 |
| 系列： | StarCore |
| 類型： | SC140 內(nèi)核 |
| 接口： | 通信處理器模塊（CPM） |
| 時(shí)鐘速率： | 275MHz |
| 非易失內(nèi)存： | 外部 |
| 芯片上RAM： | 512kB |
| 電壓 - 輸入/輸出： | 3.30V |
| 電壓 - 核心： | 1.60V |
| 工作溫度： | -40°C ~ 105°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 332-BFBGA，F(xiàn)CPBGA |
| 供應(yīng)商設(shè)備封裝： | 332-FCBGA（17x17） |
| 包裝： | 托盤 |
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Layout Practices
MSC8101 Technical Data, Rev. 19
Freescale Semiconductor
4-3
Since the address pins switch once at every second cycle, the address pins frequency is a quarter of the bus
frequency (that is, 25 MHz).
For the same reason the data pins frequency is 3.125 MHz.
Calculating internal power (from Table 2-5 values):
PCORE (200) = ((PCORE – PLCO)/300) × 200 + PLCO =((450 – 3) / 300 × 200 + 3 = 301
PCPM (100) = ((PCPM – PLCP) / 200) × 100 + PLCP = ((320 – 6) / 200) × 100 + 6 = 163
PSIU (50) = ((PSIU – PLSI) / 100) × 50 + PLSI = ((80 – 2) / 100) × 50 + 2 = 41
PINT = PCORE(200) + PCPM(100) + PSIU(50) = 301 + 163 + 41 = 505
PD = PINT + PI/O = 505 + 67 = 572
Maximum allowed ambient temperature is:
TA = TJ – (PD × θJA)
4.4 Layout Practices
Each VCC and VDD pin on the MSC8101 should be provided with a low-impedance path to the board’s power
supply. Similarly, each GND pin should be provided with a low-impedance path to ground. The power supply pins
drive distinct groups of logic on the chip. The VCC power supply should be bypassed to ground using at least four
0.1 F by-pass capacitors located as closely as possible to the four sides of the package. The capacitor leads and
associated printed circuit traces connecting to chip VCC, VDD, and GND should be kept to less than half an inch per
capacitor lead. A four-layer board is recommended, employing two inner layers as VCC and GND planes.
All output pins on the MSC8101 have fast rise and fall times. Printed circuit board (PCB) trace interconnection
length should be minimized in order to minimize undershoot and reflections caused by these fast output switching
times. This recommendation particularly applies to the address and data busses. Maximum PCB trace lengths of six
inches are recommended. Capacitance calculations should consider all device loads as well as parasitic
capacitances due to the PCB traces. Attention to proper PCB layout and bypassing becomes especially critical in
systems with higher capacitive loads because these loads create higher transient currents in the VCC, VDD, and GND
circuits. Pull up all unused inputs or signals that will be inputs during reset. Special care should be taken to
minimize the noise levels on the PLL supply pins.
There are 2 pairs of PLL supply pins: VCCSYN-GNDSYN and VCCSYN1-GNDSYN1. Each pair supplies one PLL. To
ensure internal clock stability, filter the power to the VCCSYN and VCCSYN1 inputs with a circuit similar to the one in
Figure 0-1.. To filter as much noise as possible, place the circuit as close as possible to VCCSYN and VCCSYN1. The
0.01-F capacitor should be closest to VCCSYN and VCCSYN1, followed by the 10-F capacitor, the 10-nH inductor,
and finally the 10-
Ω resistor to V
DD. These traces should be kept short and direct.
Table 4-1.
Power Dissipation
Pins
Number of Pins
Switching
× C
× VDDH2
× f × 10–3
Power in mW
Address
Data, HRD, HRW
CLKOUT
4
34
1
× 30
× 3.32
× 12.5 × 10–3
× 3. 125 × 10–3
× 50 × 10–3
16.25
34.75
16
Total PI/O
67
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| MSC8101VT1500F | 功能描述:IC DSP 16BIT 250MHZ 332-FCPBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - DSP（數(shù)字式信號(hào)處理器） 系列:StarCore 標(biāo)準(zhǔn)包裝:2 系列:StarCore 類型:SC140 內(nèi)核 接口:DSI，以太網(wǎng)，RS-232 時(shí)鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:1.436MB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:-40°C ~ 105°C 安裝類型:表面貼裝 封裝/外殼:431-BFBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:431-FCPBGA（20x20） 包裝:托盤 |
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| MSC8102M4400 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Quad Core 16-Bit Digital Signal Processor |
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