參數(shù)資料
型號(hào): MT18VDDT12872PHIG-265XX
元件分類(lèi): DRAM
英文描述: 128M X 72 DDR DRAM MODULE, 0.75 ns, DMA200
封裝: SODIMM-200
文件頁(yè)數(shù): 16/39頁(yè)
文件大?。?/td> 816K
代理商: MT18VDDT12872PHIG-265XX
128MB, 256MB, 512MB, 1GB (x72, ECC, PLL)
200-PIN DDR SDRAM SODIMM
09005aef808ffdc7
Micron Technology, Inc., reserves the right to change products or specifications without notice.
DD9_18C16_32_64_128X72PHG_E.fm - Rev. E 7/03 EN
23
2003 Micron Technology, Inc. All rights reserved.
Data-out high-impedance window from CK/CK#
tHZ
+0.75
+0.8
ns
Data-out low-impedance window from CK/CK#
tLZ
-0.75
-0.8
ns
Address and control input hold time (slow slew
rate)
tIH
S
1.1
ns
Address and control input setup time (slow slew
rate)
tIS
S
1.1
ns
Address and Control input pulse width (for each
input)
tIPW
2.2
ns
LOAD MODE REGISTER command cycle time
tMRD
15
16
ns
DQ-DQS hold, DQS to first DQ to go non-valid, per
access
tQH
tHP-tQHS
ns
Data Hold Skew Factor
tQHS
0.75
1
ns
ACTIVE to PRECHARGE command
tRAS
40
120,000
40
120,000
ns
ACTIVE to READ with Auto precharge command
tRAP
20
ns
ACTIVE to ACTIVE/AUTO REFRESH command
period
tRC
65
70
ns
AUTO REFRESH command period
tRFC
75
80
ns
ACTIVE to READ or WRITE delay
tRCD
20
ns
PRECHARGE command period
tRP
20
ns
DQS read preamble
tRPRE
0.9
1.1
0.9
1.1
tCK
DQS read postamble
tRPST
0.4
0.6
0.4
0.6
tCK
ACTIVE bank a to ACTIVE bank b command
tRRD
15
ns
DQS write preamble
tWPRE
0.25
tCK
DQS write preamble setup time
tWPRES
0
ns
DQS write postamble
tWPST
0.4
0.6
0.4
0.6
tCK
Write recovery time
tWR
15
ns
Internal WRITE to READ command delay
tWTR
11
tCK
Data valid output window (DVW)
na
tQH - tDQSQ
ns
REFRESH to REFRESH command
interval
MT9VDDT1672PH
tREFC
140.6
s
All others
70.3
s
Average periodic refresh
interval
MT9VDDT1672PH
tREFI
15.6
s
All others
07.8
7.8
s
Terminating voltage delay to VDD
tVTD
00
ns
Exit SELF REFRESH to non-READ command
tXSNR
75
ns
Exit SELF REFRESH to READ command
tXSRD
200
tCK
Table 21:
Electrical Characteristics and Recommended AC Operating Conditions
(-26A, -265, and -202) (Continued)
DDR SDRAM components only; notes appear on pages 24–27
Notes: 1–5, 8, 12–15, 29, 48; 0
°C TA +70°C; VDD = VDDQ = +2.5V ±0.2V
AC CHARACTERISTICS
-26A/-265
-202
UNITS
NOTES
PARAMETER
SYMBOL
MIN
MAX
MIN
MAX
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