參數(shù)資料
型號: MT18VDDT12872PHIG-265XX
元件分類: DRAM
英文描述: 128M X 72 DDR DRAM MODULE, 0.75 ns, DMA200
封裝: SODIMM-200
文件頁數(shù): 31/39頁
文件大小: 816K
代理商: MT18VDDT12872PHIG-265XX
128MB, 256MB, 512MB, 1GB (x72, ECC, PLL)
200-PIN DDR SDRAM SODIMM
09005aef808ffdc7
Micron Technology, Inc., reserves the right to change products or specifications without notice.
DD9_18C16_32_64_128X72PHG_E.fm - Rev. E 7/03 EN
37
2003 Micron Technology, Inc. All rights reserved.
NOTE:
1. Device latencies used for SPD values.
2. Value for -26A tCK set to 7ns (0x70) for optimum BIOS compatibility. Actual device spec. value is 7.5ns.
3. The value of tRAS used for -265 modules is calculated from tRC - tRP. Actual device spec value is 40ns.
4. The JEDEC SPD specification allows fast or slow slew rate values for these bytes. The worst-case (slow slew rate) value is
represented here. Systems requiring the fast slew rate setup and hold values are supported, provided the faster mini-
mum slew rate is met.
5. Values given in format “standard DIMM Height checksum / low-profile DIMM height checksum.”
91
PCB Identification Code
1–9
01–09
92
Identification Code (Continued)
000
00
93
Year of Manufacture in BCD
Variable Data
94
Week of Manufacture in BCD
Variable Data
95-98 Module Serial Number
Variable Data
99-127 Manufacturer-Specific Data ( RSVD)
––
Table 28:
Serial Presence- Detect Matrix (MT18VDDT6472PH and
MT18VDDT12872PH) (Continued)
“1”/”0”: Serial Data, “driven to HIGH”/”driven to LOW”
BYTE
DESCRIPTION
ENTRY(VERSION)
MT18VDDT6472PH MT18VDDT12872PH
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