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參數(shù)資料
| 型號： | MT18VDDT12872PHIG-265XX |
| 元件分類： | DRAM |
| 英文描述： | 128M X 72 DDR DRAM MODULE, 0.75 ns, DMA200 |
| 封裝： | SODIMM-200 |
| 文件頁數(shù)： | 3/39頁 |
| 文件大?。?/td> | 816K |
| 代理商： | MT18VDDT12872PHIG-265XX |
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128MB, 256MB, 512MB, 1GB (x72, ECC, PLL)
200-PIN DDR SDRAM SODIMM
09005aef808ffdc7
Micron Technology, Inc., reserves the right to change products or specifications without notice.
DD9_18C16_32_64_128X72PHG_E.fm - Rev. E 7/03 EN
11
2003 Micron Technology, Inc. All rights reserved.
All other combinations of values for A7–A11, or A7–
A12 are reserved for future use and/or test modes. Test
modes and reserved states should not be used because
unknown operation or incompatibility with future ver-
sions may result.
Extended Mode Register
The extended mode register controls functions
beyond those controlled by the mode register; these
additional functions are DLL enable/disable and out-
put drive strength. These functions are controlled via
the bits shown in the Extended Mode Register Defini-
tion Diagram.
The extended mode register is pro-
grammed via the LOAD MODE REGISTER command
to the mode register (with BA0 = 1 and BA1 = 0) and
will retain the stored information until it is pro-
grammed again or the device loses power.
The
enabling of the DLL should always be followed by a
LOAD MODE REGISTER command to the mode regis-
ter (BA0, /BA1 both low) to reset the DLL.
The extended mode register must be loaded when
all device banks are idle and no bursts are in progress,
and the controller must wait the specified time before
initiating any subsequent operation. Violating either
of these requirements could result in unspecified oper-
ation.
DLL Enable/Disable
The DLL must be enabled for normal operation.
DLL enable is required during power-up initialization
and upon returning to normal operation after having
disabled the DLL for the purpose of debug or evalua-
tion. (When the device exits self refresh mode, the DLL
is enabled automatically.) Any time the DLL is enabled,
200 clock cycles must occur before a READ command
can be issued.
Figure 7: Extended Mode Register
Definition Diagram
NOTE:
1. E13 and E12 (MT9VDDT3272PH), or E14 and E13
(MT9VDDT6472PH, MT18VDDT6472PH,
MT9VDDT6472PH, MT18VDDT12872PH) (BA1 and BA0)
must be “0, 1” to select the Extended Mode Register
(vs. the base Mode Register).
2. The QFC# option is not supported.
Operating Mode
Reserved
0
–
0
–
Valid
–
0
1
DLL
Enable
Disable
DLL
11
01
A9
A7 A6 A5 A4 A3
A8
A2 A1 A0
Extended Mode
Register (Ex)
Address Bus
97
6
5
4
3
82
1
0
E0
0
Drive Strength
Normal
E1
E0
E1,
Operating Mode
A10
A11
A12
BA1 BA0
10
11
12
13
14
E2,
E3
E4
0
–
0
–
0
–
0
–
0
–
E6 E5
E7
E8
E9
0
–
0
–
E10
E11
0
–
E12
DS
DLL
11
01
A9
A7 A6 A5 A4 A3
A8
A2 A1 A0
Extended Mode
Register (Ex)
Address Bus
97
6
5
4
3
82
1
0
Operating Mode
A10
A11
BA1 BA0
10
11
12
13
DS
MT9VDDT1672PH Module Address Bus
MT9VDDT3272PH; MT18VDDT6472PH; MT9VDDT6472PH,
MT18VDDT12872PH Module Address Bus
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| MT18VDDT12872PHY-335F1 | 制造商:Micron Technology Inc 功能描述:DRAM MOD DDR SDRAM 9GBIT 184UDIMM - Trays |
| MT18VDDT12872Y-265C2 | 制造商:Micron Technology Inc 功能描述:DRAM MOD DDR SDRAM 9GBIT 184RDIMM - Trays |
| MT18VDDT12872Y-265D2 | 功能描述:MODULE SDRAM DDR 1GB 184DIMM RoHS:是 類別:存儲卡，模塊 >> 存儲器 - 模塊 系列:- 標(biāo)準(zhǔn)包裝:100 系列:- 存儲器類型:SDRAM 存儲容量:1GB 速度:133MHz 特點(diǎn):- 封裝/外殼:168-DIMM |
| MT18VDDT25672G-265A2 | 功能描述:MODULE SDRAM DDR 2GB 184DIMM RoHS:否 類別:存儲卡，模塊 >> 存儲器 - 模塊 系列:- 標(biāo)準(zhǔn)包裝:100 系列:- 存儲器類型:SDRAM 存儲容量:1GB 速度:133MHz 特點(diǎn):- 封裝/外殼:168-DIMM |
| MT18VDDT25672G-335A2 | 制造商:Micron Technology Inc 功能描述:2GB 256MX72 DDR SDRAM MODULE DIMM 2.5V REGISTERED - Bulk |
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