參數(shù)資料
型號： MT46V32M16TG-75ELIT
元件分類： DRAM
英文描述： 32M X 16 DDR DRAM, 0.75 ns, PDSO66
封裝： 0.400 INCH, PLASTIC, TSOP-66
文件頁數(shù)： 2/82頁
文件大小： 2855K
代理商： MT46V32M16TG-75ELIT
512Mb: x4, x8, x16
DDR SDRAM
09005aef80a1d9e7
Micron Technology, Inc., reserves the right to change products or specifications without notice.
512MBDDRx4x8x16_2.fm - Rev. H 7/04 EN
10
2000 Micron Technology, Inc. All rights reserved.
A8, B9, B7,
C9, C7, D9,
D7, E9, E1,
D3, D1, C3,
C1, B3, B1,
A2
2, 4, 5,
7, 8, 10,
11, 13, 54,
56, 57, 59,
60, 62, 63,
65
DQ0–DQ2
DQ3–DQ5
DQ6–DQ8
DQ9–DQ11
DQ12–
DQ14
DQ15
I/O
Data Input/Output: Data bus for x16
–
14, 17, 25,
43, 53
NC
–
No Connect for x16
These pins should be left unconnected.
A8, B7, C7,
D7, D3, C3,
B3, A2
2, 5, 8,
11, 56, 59,
62, 65
DQ0–DQ2
DQ3–DQ5
DQ6, DQ7
I/O
Data Input/Output: Data bus for x8
B1, B9, C1,
C9, D1, D9,
E1, E7, E9,
F7
4, 7, 10,
13, 14, 16,
17, 20, 25,
43, 53, 54,
57, 60, 63,
NC
–
No Connect for x8
These pins should be left unconnected.
B7, D7, D3,
5, 11, 56,
DQ0–DQ2
I/O
Data Input/Output: Data bus for x4
B3
62
DQ3
B1, B9, C1,
C9, D1, D9,
E1, E7, E9,
F7
4, 7, 10, 13,
14, 16, 17,
20, 25, 43,
53, 54, 57,
60, 63
NC
–
No Connect for x4
These pins should be left unconnected.
A2, A8, C3,
C7
2, 8, 59, 65
NF
–
No Function for x4
These pins should be left unconnected.
E3
51
DQS
I/O
Data Strobe: Output with read data, input with write data. DQS is edge-
aligned with read data, centered in write data. It is used to capture data.
For the x16, LDQS is DQS for DQ0–DQ7 and UDQS is DQS for DQ8–DQ15.
Pin 16 (E7) is NC on x4 and x8.
E7
16
LDQS
E3
51
UDQS
F9
19, 50
DNU
–
Do Not Use: Must float to minimize noise on VREF.
B2, D2, C8,
E8, A9
3, 9, 15, 55,
61
VDDQ
Supply
DQ Power Supply: +2.5V ±0.2V (+2.6V ±0.1V for DDR400). Isolated on the
die for improved noise immunity.
A1, C2, E2,
B8, D8
6, 12, 52,
58, 64
VSSQ
Supply
DQ Ground. Isolated on the die for improved noise immunity.
F8, M7, A7
1, 18, 33
VDD
Supply
Power Supply: +2.5V ±0.2V. (+2.6V ±0.1V for DDR400)
A3, F2, M3
34, 48, 66
VSS
Supply
Ground.
F1
49
VREF
Supply
SSTL_2 reference voltage.
Table 1:
Ball/Pin Descriptions (Continued)
FBGA
NUMBERS
TSOP
NUMBERS
SYMBOL
TYPE
DESCRIPTION
Table 2:
Reserved NC Balls and Pins1
FBGA
NUMBERS
TSOP
NUMBERS
SYMBOL
TYPE
DESCRIPTION
F9
17
A13
I
Address input A13 for 1Gb devices.
NOTE:
1. NC pins not listed may also be reserved for other uses now or in the future. This table simply defines specific NC pins
deemed to be of importance.
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