參數(shù)資料
型號： MT9074
廠商： Mitel Networks Corporation
英文描述： T1/E1/J1 Single Chip Transceiver
中文描述： T1/E1/J1收發(fā)單芯片收發(fā)器
文件頁數(shù)： 48/122頁
文件大小： 372K
代理商： MT9074
MT9074
Advance Information
48
2
EXTOSC
External
Setting this bit connects the pin
OSC1 to a TTL compatible input.
This allows for a system design
employing a TTL output oscillator
as a 20.000 Mhz reference clock.
Oscillator
Select
.
1
RSV
Reserved.
Set to zero for normal
operation.
0
RSV
Reserved.
Set to zero for normal
operation.
Bit
Name
Functional Description
7
TFSYNIM
Terminal
Synchronization
Mask
. When unmasked an
interrupt is initiated whenever
a change of state of terminal
frame synchronization condition
exists. If 1 - unmasked, 0 -
masked.
Frame
Interrupt
6
MFSYNIM
Multiframe
Interrupt
unmasked
initiated whenever a change of
state
of
synchronization condition exist.
If 1 - unmasked, 0 - masked.
Synchronization
Mask
.
an
interrupt
When
is
multiframe
5
- - -
Unused
.
4
AISIM
Alarm
Interrupt
unmasked a change of state of
received all ones condition will
initiate an interrupt. If 1 -
unmasked, 0 - masked.
Indication
Mask.
Signal
When
3
LOSIM
Loss of Signal Interrupt Mask
.
When unmasked an interrupt is
initiated whenever a change of
state of loss of signal condition
exists. If 1 - unmasked, 0 -
masked.
Interrupt
01000000.
vector
=
Table 32 - Interrupt Mask Word Zero (T1)
(Page 1, Address 1BH)
Bit
Name
Functional Description
Table 31 - Reset Control Word (T1)
(Page 1, Address 1AH)
2
SEFIM
Severely
Interrupt
unmasked
initiated when a sequence of 2
framing errors out of 6 occurs. If
1 - unmasked, 0 - masked.
Errored
Mask
.
an
Frame
When
interrupt
is
1
TxSLPIM
Transmit SLIP Interrupt Mask.
When unmasked an interrupt is
initiated whenever a controlled
frame slip occurs in the transmit
elastic buffer. If 1 - unmasked, 0
- masked.
0
RxSLPIM
Receive SLIP Interrupt Mask
.
When unmasked an interrupt is
initiated whenever a controlled
frame slip occurs in the receive
elastic buffer. If 1 - unmasked, 0
- masked.
Bit
Name
Functional Description
7
FEIM
Framing Bit Error Interrupt
Mask
.
When
interrupt is initiated whenever an
erroneous framing bit is detected
(provided the circuit is in terminal
frame sync). If 1 - unmasked, 0 -
masked.
unmasked
an
6
CRCIM
CRC-6 Error Interrupt Mask
.
When unmasked an interrupt is
initiated whenever a local CRC-6
error occurs. If 1 - unmasked, 0 -
masked.
5
YELIM
Yellow Alarm Interrupt Mask
.
When unmasked detection of a
yellow
alarm
interrupt. If 1 - unmasked, 0 -
masked.
triggers
an
4
COFAIM
Change of Frame Alignment
Interrupt
Mask
.
unmasked an interrupt is initiated
whenever a change of frame
alignment occurs after a reframe.
If 1 - unmasked, 0 - masked.
When
Table 33 - Interrupt Mask Word One (T1)
(Page 1, Address 1CH
Bit
Name
Functional Description
Table 32 - Interrupt Mask Word Zero (T1)
(Page 1, Address 1BH)
相關PDF資料
PDF描述
MT9074AL T1/E1/J1 Single Chip Transceiver
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MT9074 T1/E1/J1 Single Chip Transceiver(T1/E1/J1單片收發(fā)器)
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參數(shù)描述
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