參數(shù)資料
型號: MT9074
廠商: Mitel Networks Corporation
英文描述: T1/E1/J1 Single Chip Transceiver
中文描述: T1/E1/J1收發(fā)單芯片收發(fā)器
文件頁數(shù): 63/122頁
文件大?。?/td> 372K
代理商: MT9074
Advance Information
MT9074
63
Bit
Name
Functional Description
7
- - -
Unused
.
6
HDLC0I
HDLC0 Interrupt.
Whenever an
unmasked HDLC0 interrupt occurs
(from the 4 kHz data link) this bit
goes high. Reading this register
clears this bit.
5
HDLC1I
HDLC1 Interrupt.
Whenever an
unmasked HDLC1 interrupt occurs
(from
the
DS1
signalling channel) this bit goes
high. Reading this register clears
this bit.
channel
24
4
LCDI
Loop Code Detected Interrupt
.
When unmasked this interrupt bit
goes high whenever either the
loop up (00001) or loop down
(001) code has been detected on
the line for a period of 48
milliseconds. Reading this register
clears this bit.
3
1SECI
One Second Status Interrupt.
When unmasked this interrupt bit
goes high whenever the 1SEC
status bit (page 3 address 12H bit
7) goes from low to high. Reading
this register clears this bit.
2
5SECI
Five Second Status Interrupt
.
When unmasked this interrupt bit
goes high whenever the 5 SEC
status bit goes from low to high.
Reading this register clears this
bit.
Table 69 - Interrupt Word Three
(Page 4, Address 1EH) (T1)
1
BIOMI
Bit Oriented Message Interrupt
.
When unmasked this interrupt bit
goes high whenever a pattern
111111110xxxxxx0
received on the FDL that is
different from the last message.
The new message must persist for
8 out the last 10 message
positions to be accepted as a valid
new
message.
register clears this bit.
has
been
Reading
this
0
SIGI
Signalling
unmasked this interrupt bit goes
high whenever a change of state
(optionally debounced - see DBEn
in the Data Link, Signalling Control
Word page 1 address 12H) is
detected in the signalling bits (AB
or ABCD) pattern. Reading this
register clears this bit.
Interrupt
.
When
Bit
Name
Functional Description
Table 69 - Interrupt Word Three
(Page 4, Address 1EH) (T1)
相關PDF資料
PDF描述
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