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參數(shù)資料
| 型號： | MT9074 |
| 廠商： | Mitel Networks Corporation |
| 英文描述： | T1/E1/J1 Single Chip Transceiver |
| 中文描述： | T1/E1/J1收發(fā)單芯片收發(fā)器 |
| 文件頁數(shù)： | 65/122頁 |
| 文件大?。?/td> | 372K |
| 代理商： | MT9074 |
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Advance Information
MT9074
65
Per Channel Transmit Signalling (Pages 5 and 6) (T1)
Page 05H, addresses 10000 to 11111, and page 06H addresses 10000 to 10111 contain the Transmit
Signalling Control Words for DS1 channels 1 to 16 and 17 to 24 respectively. Table 107 illustrates the mapping
between the addresses of these pages and the DS1 channel numbers. Control of these bits for any one
channel is through the processor or controller port when the Per Time Slot Control bit RPSIG bit is high. Table
72 describes bit allocation within each of these registers.
Serial per channel transmit signalling control through CSTi is selected when the Per Time Slot Control bit
RPSIG bit is low. Table 71 describes the bit allocation within each of the 24 active ST-BUS time slots of CSTi.
Page 5-6 Address:
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Equivalent DS1
channel
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Page 6 Address:
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Equivalent DS1
channel
17
18
19
20
21
22
23
24
x
x
x
x
x
x
x
x
Table 71 - Page 5, 6 Address Mapping to DS1 Channels (T1)
Bit
Name
Functional Description
7 - 4
- - -
Unused
.
3
A(n)
Transmit Signalling Bits A for Channel n
. Where signalling is enabled, these bits
are transmitted in bit position 8 of the 6th DS1 frame (within the 12 frame
superframe structure for D4 superframes and the 24 frame structure for ESF
superframes).
2
B(n)
Transmit Signalling Bits B for Channel n
. Where signalling is enabled, these bits
are transmitted in bit position 8 of the 12th DS1 frame (within the 12 frame
superframe structure for D4 superframes and the 24 frame structure for ESF
superframes).
1
C(n)
Transmit Signalling Bits C for Channel n
. Where signalling is enabled, these bits
are transmitted in bit position 8 of the 18th DS1 frame within the 24 frame structure
for ESF superframes. In D4 mode these bits are unused.
0
D(n)
Transmit Signalling Bits D for Channel n.
Where signalling is enabled, these bits
are transmitted in bit position 8 of the 24th DS1 frame within the 24 frame structure
for ESF superframes. In D4 mode these bits are unused.
Table 72 - Transmit Channel Associated Signalling (T1) (Pages 5,6)
相關PDF資料 |
PDF描述 |
|---|---|
| MT9074AL | T1/E1/J1 Single Chip Transceiver |
| MT9074AP | T1/E1/J1 Single Chip Transceiver |
| MT9074 | T1/E1/J1 Single Chip Transceiver(T1/E1/J1單片收發(fā)器) |
| MT9075B | E1 Single Chip Transceiver |
| MT9075B | E1 Single Chip Transceiver(E1單片收發(fā)器) |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MT9074_05 | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:T1/E1/J1 Single Chip Transceiver |
| MT9074AL | 制造商:Microsemi Corporation 功能描述:FRAMER E1/J1/T1 5V 100MQFP - Trays 制造商:Zarlink Semiconductor Inc 功能描述:FRAMER E1/J1/T1 5V 100MQFP - Trays |
| MT9074AL1 | 制造商:Microsemi Corporation 功能描述:FRAMER E1/J1/T1 5V 100MQFP - Trays |
| MT9074AP | 制造商:Microsemi Corporation 功能描述: |
| MT9074AP1 | 制造商:Microsemi Corporation 功能描述:T1/E1/J1 SGLE CHIP XSCR 制造商:Microsemi Corporation 功能描述:FRAMER E1/J1/T1 5V 68PLCC - Rail/Tube 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC TXRX SGL T1/E1 68PLCC 制造商:Microsemi Corporation 功能描述:IC TXRX SGL T1/E1 68PLCC |
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