參數(shù)資料
型號： MT9074AL
廠商： Mitel Networks Corporation
英文描述： T1/E1/J1 Single Chip Transceiver
中文描述： T1/E1/J1收發(fā)單芯片收發(fā)器
文件頁數(shù)： 50/122頁
文件大?。?/td> 372K
代理商： MT9074AL
MT9074
Advance Information
50
o
Bit
Name
Functional Description
7-5
- - -
Unused
.
4
LCDIM
Loop Code Detected Interrupt
Mask
.
When
interrupt is triggered when either
the loop up (00001) or loop down
(001) code has been detected on
the line for a period of 48
milliseconds. If 1 - unmasked, 0 -
masked.
unmasked
an
3
1SECIM
One Second Status Interrupt
Mask.
When
interrupt is initiated when the
1SEC status bit (page 3 address
12H bit 7) goes from low to high.
If 1 - unmasked, 0 - masked.
unmasked
an
2
5SECIM
Five Second Status Interrupt
Mask
.
When
interrupt is initiated when the 5
SEC status bit goes from low to
high. If 1 - unmasked, 0 -
masked.
unmasked
an
1
BIOMIM
Bit
Interrupt
unmasked an interrupt is initiated
when
a
111111110xxxxxx0
received on the FDL that is
different from the last message.
The new message must persist
for 8 out the last 10 message
positions to be accepted as a
valid
new
message.
unmasked, 0 - masked.
Oriented
Message
When
Mask
.
pattern
been
has
If
1-
0
SIGIM
Signalling
When unmasked an interrupt will
be initiated when a change of
state (optionally debounced - see
DBEn in the Data Link, Signalling
Control Word page 1 address
12H) is detected in the signalling
bits (AB or ABCD) pattern. If 1 -
unmasked, 0 - masked.
Interrupt
Mask.
Table 35 - Interrupt Mask Word Three (T1)
(Page 1, Address 1EH)
Bit
Name
Functional Description
7
NRZ
NRZ Format Selection
. Only
used in the digital framer only
mode (LIU is disabled). A one sets
the MT9074 to accept a unipolar
NRZ format input stream on RxA
as the line input, and to transmit a
unipolar NRZ format stream on
TxB. A zero causes the MT9074 to
accept a complementary pair of
dual rail inputs on RxA/RxB and to
transmit a complementary pair of
dual rail outputs on TxA/TxB.
6 -
4
TXL2-0
Transmit Line Build Out 2 - 0
.
Setting these bits shapes the
transmit pulse as detailed in the
table below:
TX22 TXL1 TXL0 Line Build Out
0 0 0 0 to 133 feet/ 0 dB
0 0 1 133 to 266 feet
0 1 0 266 to 399 feet
0 1 1 399 to 533 feet
1 0 0 533 to 655 feet
1 0 1 -7.5 dB
1 1 0 -15 dB
1 1 1 -22.5 dB
After reset these bits are zero.
3
REDBL
Receive Equalizer Disable
. If one
the receive equalizer is turned off.
If zero, the receive equalizer is
turned on and will compensate for
loop length automatically.
2-0
RES2-0
Receive
Setting these pins forces a level of
equalization of the incoming line
data.
RES2
RES1
Equalization
0 0 0 none
0 0 1 6dB
0 1 0 12dB
0 1 1 18dB
1 0 0 24dB
1 0 1 reserved
1 1 0 reserved
1 1 1 reserved
These settings have no effect if
REDBL is set to zero.
Equalization
Select
.
RES0
Receive
Table 36 - LIU Control Word (T1)
(Page 1, Address 1FH)
相關(guān)PDF資料
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