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參數(shù)資料
| 型號(hào)： | MT9076 |
| 廠商： | Mitel Networks Corporation |
| 英文描述： | T1/E1/J1 3.3V Single Chip Transceiver |
| 中文描述： | T1/E1/J1收發(fā)3.3V的單芯片收發(fā)器 |
| 文件頁(yè)數(shù)： | 7/160頁(yè) |
| 文件大?。?/td> | 416K |
| 代理商： | MT9076 |
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Preliminary Information
MT9076
7
LIU
The MT9076 LIU interfaces the digital framer functions to either the DS1 (T1 mode) or PCM 30 (E1 mode)
transformer-isolated four wire line.
In T1 mode, the LIU can pre-equalize the transmit signal to meet the T1.403 and T1.102 pulse templates after
attenuation by 0 - 655 feet of 22 AWG PIC cable, alternatively it can provide line build outs of 7.5dB, 15dB and
22.5dB. In T1 mode the receiver can recover signals attenuated by up to 43dB at 772kHz.
In E1 mode, the LIU transmits signals that meet the G.703 2.048 Mbit/s pulse template and the receiver can
recover signals attenuated by up to 43dB at 1024kHz.
Digitial Framer Only Mode
To accommodate some special applications, the MT9076 supports a digital framer only mode that provides
direct access to the transmit and receive data in digital format, i.e. by-passing the analog LIU front-end. In
digital framer only mode, the MT9076 supports unipolar non-return to zero or bipolar return to zero data.
PLL and Slip Buffers
The MT9076 PLL attenuates jitter from 2.5 Hz with a roll-off of 20 dB/decade. The intrinsic jitter is less than
0.02 UI. The device can operate in one of three timing modes: System Bus Synchronous Mode, Line
Synchronous Mode, or Free-run Mode. In all three timing modes the low jitter output of the PLL provides timing
to the transmit side of the LIU.
In T1 mode, the receive and transmit paths both include two-frame slip buffers. The transmit slip buffer features
programmable delay and serves as a Jitter Attenuator (JA) FIFO and a rate converter between the ST-BUS and
the 1.544 Mbit/s T1 line rate.
In E1 mode, the receive path includes a two-frame slip buffer and the transmit path contains a 128 bit Jitter
Attenuator (JA) FIFO with programmable depth.
Interface to the System Backplane
On the system side the MT9076 framers can interface to a 2.048Mbit/s or 8.192Mbit/s ST-BUS backplane.
There is an asynchronous mode for Inverse MUX for ATM (IMA) applications, this enables the framer to
interface to a 1.544Mbit/s (T1) or 2.048Mbit/s (E1) serial bus with asynchronous transmit and receive timing.
Framing Modes
The MT9076 framers operate in termination mode or transparent mode. In the receive transparent mode, the
received line data is channelled to the DSTo pin with arbitrary frame alignment. In the transmit transparent
mode, no framing or signaling is imposed on the data transmitted from the DSTi pin onto the line.
In T1 mode, the framers operate in any of the following framing modes: D4, Extended Superframe (ESF) or
SLC-96.
In E1 mode, the framers run three framing algorithms: basic frame alignment, signaling multiframe alignment
and CRC-4 multiframe alignment. The Remote Alarm Indication (RAI) bit is automatically controlled by an
internal state machine.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MT9076AB | T1/E1/J1 3.3V Single Chip Transceiver |
| MT9076 | T1/E1/J1 3.3V Single Chip Transceiver(T1/E1/J1 3.3V 單片收發(fā)器) |
| MT9079 | Advanced Controller for E1(先進(jìn)的E1幀調(diào)節(jié)器和控制器) |
| MT9080B | SMX - Switch Matrix Module(用于消費(fèi)類(lèi)轉(zhuǎn)換應(yīng)用的開(kāi)關(guān)矩陣模塊) |
| MT90810 | Flexible MVIP(Multi-Vendor Integration Protocol) Interface Circuit(彈性MVIP接口電路) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MT9076AB | 制造商:MITEL 制造商全稱(chēng):Mitel Networks Corporation 功能描述:T1/E1/J1 3.3V Single Chip Transceiver |
| MT9076AP | 制造商:MITEL 制造商全稱(chēng):Mitel Networks Corporation 功能描述:T1/E1/J1 3.3V Single Chip Transceiver |
| MT9076B | 制造商:ZARLINK 制造商全稱(chēng):Zarlink Semiconductor Inc 功能描述:T1/E1/J1 3.3 V Single Chip Transceiver |
| MT9076BB | 制造商:Zarlink Semiconductor Inc 功能描述:FRAMER E1/J1/T1 3.3V 80LQFP - Trays |
| MT9076BB1 | 制造商:Zarlink Semiconductor Inc 功能描述:FRAMER E1/J1/T1 3.3V 80LQFP - Trays |
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