參數(shù)資料
型號: P60ARM-B
廠商: Zarlink Semiconductor Inc.
英文描述: Low power, general purpose 32-bit RISC microprocessor
中文描述: 低功耗,通用32位RISC微處理器
文件頁數(shù): 55/120頁
文件大小: 1275K
代理商: P60ARM-B
Instruction Set - SWI
51
4.10.5 Examples
SWI
SWI
SWINE
ReadC
WriteI+”k”
0
; get next character from read stream
; output a “k” to the write stream
; conditionally call supervisor
; with 0 in comment field
The above examples assume that suitable supervisor code exists, for instance:
0x08 B Supervisor
; SWI entry point
EntryTable
DCD ZeroRtn
DCD ReadCRtn
DCD WriteIRtn
. . .
; addresses of supervisor routines
Zero
ReadC
WriteI
EQU 0
EQU 256
EQU 512
Supervisor
; SWI has routine required in bits 8-23 and data (if any) in bits 0-7.
; Assumes R13_svc points to a suitable stack
STMFD
LDR
BIC
MOV
ADR
LDR
R13,{R0-R2,R14}
R0,[R14,#-4]
R0,R0,#0xFF000000
R1,R0,LSR#8
R2,EntryTable
R15,[R2,R1,LSL#2]
; save work registers and return address
; get SWI instruction
; clear top 8 bits
; get routine offset
; get start address of entry table
; branch to appropriate routine
WriteIRtn
. . . . . .
LDMFD
; enter with character in R0 bits 0-7
R13,{R0-R2,R15}^
; restore workspace and return
; restoring processor mode and flags
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