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參數(shù)資料
| 型號： | P60ARM-B |
| 廠商： | Zarlink Semiconductor Inc. |
| 英文描述： | Low power, general purpose 32-bit RISC microprocessor |
| 中文描述： | 低功耗，通用32位RISC微處理器 |
| 文件頁數(shù)： | 79/120頁 |
| 文件大小： | 1275K |
| 代理商： | P60ARM-B |
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Instruction Cycle Operations
75
7.0 Instruction Cycle Operations
In the following tables
nMREQ
and
SEQ
(which are pipelined up to one cycle ahead of the cycle to which
they apply) are shown in the cycle in which they appear, so they predict the type of the next cycle. The
address,
nBW
,
nRW
, and
nOPC
(which appear up to half a cycle ahead) are shown in the cycle to which
they apply.
Key:-
(pc)
Xn
=
=
contents of the pc.
exception vector
￥
=
a varying number
7.1 Branch and branch with link
A branch instruction calculates the branch destination in the first cycle, whilst performing a prefetch from
the current PC. This prefetch is done in all cases, since by the time the decision to take the branch has been
reached it is already too late to prevent the prefetch.
During the second cycle a fetch is performed from the branch destination, and the return address is stored
in register 14 if the link bit is set.
The third cycle performs a fetch from the destination + 4, refilling the instruction pipeline, and if the branch
is with link R14 is modified (4 is subtracted from it) to simplify return from SUB PC,R14,#4 to MOV PC,R14.
This makes the STM..{R14} LDM..{PC} type of subroutine work correctly. The cycle timings are shown
below in
Table 7: Branch Instruction Cycle Operations
pc
is the address of the branch instruction
alu
is an address calculated by ARM60
(alu)
are the contents of that address, etc
7.2 Data Operations
A data operation executes in a single datapath cycle except where the shift is determined by the contents of
a register. A register is read onto the A bus, and a second register or the immediate field onto the B bus. The
ALU combines the A bus source and the shifted B bus source according to the operation specified in the
instruction, and the result (when required) is written to the destination register. (Compares and tests do not
produce results, only the ALU status flags are affected.)
Cycle
Address
nBW
nRW
Data
nMREQ
SEQ
nOPC
1
pc+8
1
0
(pc + 8)
0
0
0
2
alu
1
0
(alu)
0
1
0
3
alu+4
1
0
(alu + 4)
0
1
0
alu+8
Table 7: Branch Instruction Cycle Operations
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| P60ARM-GP1N | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Low power, general purpose 32-bit RISC microprocessor |
| P60ARM-IG | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Low power, general purpose 32-bit RISC microprocessor |
| P-60AS/A18 | 功能描述:BATTERY NICAD 2/3A 600MAH W/TAB RoHS:否 類別:電池產(chǎn)品 >> 電池，充電式（蓄電池） 系列:- MSDS 材料安全數(shù)據(jù)表:Nickel Metal Hydride Battery MSDS 標準包裝:1,000 系列:TWICELL 電池化學(xué):鎳金屬氫化物 電池大小:AAA 電壓 - 額定:1.2V 容量:930mAh 尺寸/尺寸:- 端接類型:焊片 放電速率:186mA 標準充電電流:100mA 標準充電時間:16小時 重量:0.029 磅（13.15g） 裝運信息:- 其它名稱:SY153T |
| P60AS302 | 制造商:APEM 功能描述: |
| P60AS632-8C | 制造商:NYLOK 功能描述: |
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