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| 型號(hào)： | PC87393F-VJG |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 外設(shè)及接口 |
| 英文描述： | 100-Pin LPC SuperI/O Devices for Portable Applications |
| 中文描述： | MULTIFUNCTION PERIPHERAL, PQFP100 |
| 封裝： | TQFP-100 |
| 文件頁(yè)數(shù)： | 147/148頁(yè) |
| 文件大?。?/td> | 1733K |
| 代理商： | PC87393F-VJG |
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6.0 Musical Instrument Digital Interface (MIDI) Port (Continued)
98
www.national.com
Figure 19. MIDI Byte Transfer Waveform
6.2.5
MIDI Signals Routing Control Logic
The MIDI Signals Routing Control Logic controls the various routing options available for the MIDI transmit and receive sig-
nals. It is controlled by the MIDI Control register (MCNTL, see Section 6.3.6). These routing options are not part of the Leg-
acy definition of the MIDI Port.
6.2.6
Operation Modes
The MIDI Port can be operated in one of the following modes:
q
Pass-Thru (Non-UART) Mode (default)
q
UART Mode.
Pass-Thru (Non-UART) Mode
After a hardware reset, the MIDI Port is in Pass-Thru mode.
In this mode, transmission is disabled by default, and all writes to the MIDI Data Out register (MDO, see Section 6.3.3) are
ignored. Transmission in this mode may be enabled by setting bit 4 of the MIDI Control register (MCNTL, see Section 6.3.6).
Receive in Pass-Thru mode is enabled, and a 16-byte Receive FIFO is available. Reading the MIDI Data In register (MDI,
see Section 6.3.2) in this mode returns the oldest data stored in the Receive FIFO. If serial data is received while the Receive
FIFO is full with data that has not yet been read, the last received data is lost, thus maintaining the data that was previously
stored in the Receive Buffer.
When in Pass-Thru mode, the MIDI Port responds to commands issued by the host, as follows:
q
3Fh puts the MIDI Port in UART mode. Also, in response to this command, the MIDI Port puts an acknowledge byte
of FEh in the Receive Buffer.
q
A0h-A7h or ABh causes the MIDI Port to put an acknowledge byte of FEh followed by a data byte of 00h in the Re-
ceive Buffer.
q
ACh causes the MIDI Port to put an acknowledge byte of FEh, followed by a data byte of 15h, in the Receive Buffer.
q
ADh causes the MIDI Port to put an acknowledge byte of FEh, followed by a data byte of 01h, in the Receive Buffer.
q
AFh causes the MIDI Port to put an acknowledge byte of FEh, followed by a data byte of 64h, in the Receive Buffer.
q
FFh resets the MIDI Port to its initial state, including all the bits of the MSTAT register. In response, the MIDI Port
puts an acknowledge of FEh in the Receive Buffer. This command is usually referred to as the MIDI Reset Command.
q
The MIDI Port responds to all other commands by putting an acknowledge byte of FEh in the Receive Buffer.
Putting the acknowledge byte of FEh is equivalent to receiving a data byte. Therefore, once an acknowledge byte is put in
the Receive Buffer, it causes the Receive Buffer Empty status flag (see Section 6.2.7) to be cleared, which may also cause
a MIDI Port interrupt request to be issued.
When the Receive FIFO is disabled, switching from Pass-Thru mode to UART mode causes data stored in the Receive Buff-
er to be lost. After switching to UART mode, the MIDI Port is blocked for receive until the acknowledge byte is read from the
Receive Buffer.
If a command is issued to the MIDI Port while the MIDI Communication Engine is in the middle of a byte transfer (the Start
bit has been transmitted or received), the execution of the command and the response are postponed until the ongoing byte
transfer is completed.
After each MIDI Port operation in Pass-Thru mode, the MIDI Status register (MSTAT, see Section 6.3.4) is updated accord-
ingly.
MIDI Signal
Data Bits
10
1
0
10
Start
Bit
Stop
Bit
32
sec
LSB
MSB
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| PC87393VJG | 制造商:Texas Instruments 功能描述: 制造商:Texas Instruments 功能描述:IC, SUPER I/O DEVICE, TQFP-100, Logic Device Type:Buffer, Supply Voltage Min:3V, |
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