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| 型號(hào)： | PC87393F-VJG |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類(lèi)： | 外設(shè)及接口 |
| 英文描述： | 100-Pin LPC SuperI/O Devices for Portable Applications |
| 中文描述： | MULTIFUNCTION PERIPHERAL, PQFP100 |
| 封裝： | TQFP-100 |
| 文件頁(yè)數(shù)： | 59/148頁(yè) |
| 文件大?。?/td> | 1733K |
| 代理商： | PC87393F-VJG |
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1.0 Signal/Pin Connection and Description (Continued)
18
www.national.com
1.5
DETAILED SIGNAL/PIN DESCRIPTIONS
This section describes all the signals used in the PC8739x family. Some members of the PC8739x family implement
a subset of these signals. Refer to the table on page 3 to identify the functions relevant to a specific device.
1.5.1
Bus Interface
1.5.2
Clock
1.5.3
Infrared (IR)
Signal
Pin(s)
I/O Buffer Type Power Well
Description
LAD3-0
18-15
I/O
INPCI/OPCI
VDD
LPC Address-Data. Multiplexed command, address bi-
directional data and cycle status.
LCLK
8
I
INPCI
VDD
LPC Clock. Same 33 MHz clock as the PCI clock.
LDRQ
11
O
OPCI
VDD
LPC DMA Request. Encoded DMA request for LPC interface.
LFRAME
12
I
INPCI
VDD
LPC Frame. Low pulse indicates the beginning of new LPC
cycle or termination of a broken cycle.
LRESET
9
I
INPCI
VDD
LPC Reset. Practically the PCI system reset.
SERIRQ
10
I/O
INPCI/OPCI
VDD
Serial IRQ. The interrupt requests are serialized over a single
pin, where each IRQ level is delivered during a designated time
slot.
SMI
19
OD
OD12
VDD
System Management Interrupt
LPCPD
7
I
INPCI
VDD
Power Down. Indicates that power is going to be shut on the
LPC interface.
CLKRUN
6
I/OD INPCI/OD12
VDD
Clock Run. Indicates that LCLK is going to be stopped, and
requests full-speed LCK (same as PCI CLKRUN).
Signal
Pin(s)
I/O Buffer Type Power Well
Description
CLKIN
20
I
INT
VDD
Clock In. Active clock input signal of 32.768 KHz, 14.318 MHz or
48 MHz.
Signal
Pin/s
I/O Buffer Type Power Well
Description
IRRX1
69
I
INTS
VDD
IR Receive 1. Primary input to receive serial data from the IR
transceiver. Monitored during power-off for wake-up event
detection.
IRRX2_IRSL0 68
I/O
INTS/O3/6
VDD
IRRX2 - IR Receive 2. Auxiliary IR receiver input to support a
second transceiver. Monitored during power-off for wake-up event
detection.
IRSL3-0 IR Select. Outputs are used to control the IR transceivers.
Input for PnP identication of plug-in IR transceiver (dongle).
After reset, the dual function IRSLX pins wake up in input mode.
After the ID is read by the IR driver, these pins can be put into
output mode. The output mode is controlled by Serial Port 2.
IRSL1
67
I/O
INT/O3/6
VDD
IRSL2
71, 34
I/O
INT/O3/6
VDD
IRSL3
66
I
INT
VDD
IRTX
70
O
O6/12
VDD
IR Transmit. IR serial output data.
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相關(guān)代理商/技術(shù)參數(shù) |
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| PC87393VJG | 制造商:Texas Instruments 功能描述: 制造商:Texas Instruments 功能描述:IC, SUPER I/O DEVICE, TQFP-100, Logic Device Type:Buffer, Supply Voltage Min:3V, |
| PC87393-VJG | 制造商:NSC 制造商全稱(chēng):National Semiconductor 功能描述:100-Pin LPC SuperI/O Devices for Portable Applications |
| PC87410 | 制造商:NSC 制造商全稱(chēng):National Semiconductor 功能描述:PC87410 PCI-IDE Interface Controller |
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