![](http://datasheet.mmic.net.cn/330000/PCI4410A_datasheet_16443872/PCI4410A_124.png)
6
–
4
6.3
Socket Present State Register
The socket present state register reports information about the socket interface. Write transactions to the socket force
event register (CardBus offset 0Ch, see Section 6.4) are reflected here, as well as general socket-interface status.
Information about PC Card V
CC
support and card type is updated only at each insertion. Also, note that the PCI4410A
device uses CCD1 and CCD2 during card identification, and changes on these signals during this operation are not
reflected in this register. See Table 6
–
4 for a complete description of the register contents.
Bit
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
Name
Socket present state
Type
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
Default
0
0
1
1
0
0
0
0
0
0
0
0
0
0
0
0
Bit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Name
Socket present state
Type
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
Default
0
0
0
0
0
0
0
0
0
X
0
0
0
X
X
X
Register:
Type:
Offset:
Default:
Socket present state
Read-only
CardBus socket address + 08h
3000 00XXh
Table 6
–
4. Socket Present State Register Description
BIT
SIGNAL
TYPE
FUNCTION
31
YVSOCKET
R
YV socket. Bit 31 indicates whether or not the socket can supply VCC = Y.Y V to PC Cards. The PCI4410A
device does not support Y.Y-V VCC; therefore, this bit is hardwired to 0.
XV socket. Bit 30 indicates whether or not the socket can supply VCC = X.X V to PC Cards. The PCI4410A
device does not support X.X-V VCC; therefore, this bit is hardwired to 0.
3-V socket. Bit 29 indicates whether or not the socket can supply VCC = 3.3 V to PC Cards. The PCI4410A
device does support 3.3-V VCC; therefore, this bit always is set unless overridden by the socket force event
register (CardBus offset 0Ch, see Section 6.4).
30
XVSOCKET
R
29
3VSOCKET
R
28
5VSOCKET
R
5-V socket. Bit 28 indicates whether or not the socket can supply VCC = 5 V to PC Cards. The PCI4410A
device does support 5-V VCC; therefore, this bit always is set unless overridden by the socket force event
register (CardBus offset 0Ch, see Section 6.4).
27
–
14
RSVD
R
Reserved. Bits 27
–
14 return 0s when read.
13
YVCARD
R
YV card. Bit 13 indicates whether or not the PC Card inserted in the socket supports VCC = Y.Y V.
XV card. Bit 12 indicates whether or not the PC Card inserted in the socket supports VCC = X.X V.
3-V card. Bit 11 indicates whether or not the PC Card inserted in the socket supports VCC = 3.3 V.
5-V card. Bit 10 indicates whether or not the PC Card inserted in the socket supports VCC = 5 V.
Bad VCC request. Bit 9 indicates that the host software has requested that the socket be powered at an
invalid voltage.
0 = Normal operation (default)
1 = Invalid VCC request by host software
Data lost. Bit 8 indicates that a PC Card removal event may have caused lost data because the cycle did
not terminate properly or because write data still resides in the PCI4410A device.
0 = Normal operation (default)
1 = Potential data loss due to card removal
12
XVCARD
R
11
3VCARD
R
10
5VCARD
R
9
BADVCCREQ
R
8
DATALOST
R
7
NOTACARD
R
Not a card. Bit 7 indicates that an unrecognizable PC Card is inserted in the socket. This bit is not updated
until a valid PC Card is inserted into the socket.
0 = Normal operation (default)
1 = Unrecognizable PC Card detected