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參數(shù)資料
| 型號： | PDI1394L41 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Content Protection AV Link Layer(內(nèi)容可保護的AV鏈接層控制器) |
| 中文描述： | 影音內(nèi)容保護鏈路層（內(nèi)容可保護的視聽鏈接層控制器） |
| 文件頁數(shù)： | 57/81頁 |
| 文件大小： | 303K |
| 代理商： | PDI1394L41 |
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Philips Semiconductors
Preliminary specification
PDI1394L41
1394 content protection AV link layer controller
2000 Apr 15
54
13.2.4
The AV Transmitter Interrupt Control and Status register is the interrupt register for the AV transmitter.
Isochronous Transmitter Interrupt Acknowledge (ITXINTACK) – Base Address: 0x02C
Bits 2, 3, and 4 “auto repair” themselves, i.e. AVLINK will detect the situation and attempt to recover on its own. The host controller still needs to
clear these interrupts to be alerted the next time.
29 28 272625 24 23 22 212019 18 1716 15 1413 12 11 10 9 8 7 6 5 4 3 2 1 0
D
I
I
D
I
T
T
P
I
I
D
I
E
S
SV01054
3130
I
I
I
I
I
M
Reset Value 0x00000000
Bit 14:
R/W
M6 ERROR: Either the M6 cipher block has encountered an unrecoverable error. Proper operation will be resumed
by disabling and resetting the ITX.
ITO/E: An odd/even key change has occurred in the cipher, it is now OK to write in the new key set.
ITEMI: This bit indicates that the EMI bit value used to cipher outgoing transmission has changed.
Bits 9 .. 0 are interrupt acknowledge bits; and are defined as:
Bit 9:
R/W
IT100LFT: Interrupt when transmitter queue reaches 100 quadlets from full.
Bit 8:
R/W
IT256LFT: Interrupt when transmitter queue reaches 256 quadlets from full.
Bit 7:
R/W
IT512LFT: Interrupt when transmitter queue reaches 512 quadlets from full. This bit is disabled if 0.5K Byte buffer
size is set.
Bit 6:
R/W
TRMSYT: Interrupt on transmission of a SYT in CIP header quadlet 2
Bit 5:
R/W
TRMBP: Interrupt on payload transmission/discard complete.
Bit 4:
R/W
DBCERR: Acknowledge interrupt on Data Block Count (DBC) synchronization loss.
Bit 3:
R/W
INPERR: Acknowledge interrupt on input error (input data discarded).
Bit 2:
R/W
DISCARD: Interrupt on lost cycle (payload discarded).
Bit 1:
R/W
ITXFULL: Interrupt on isochronous memory bank full. This is a fatal error. The ITX transmitter will reset itself
automatically when this occurs.
Bit 0:
R/W
ITXEMPTY: Interrupt on isochronous memory bank empty.
Other bits will always read ‘0’.
Bit 13:
Bit 12:
R/W
R/W
13.2.5
These are the enabled bits for the AV Transmitter Control.
Isochronous Transmitter Interrupt Enable (ITXINTE) – Base Address: 0x030
29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
8
7
6
5 4
3
2 1
0
E
E
E
E
E
E
E
P
I
I
D
I
E
S
31 30
SV01055
E
E
E
E
E
E
Reset Value 0x00000000
Bits 13..0 are interrupt enable bits for the Isochronous Transmitter Interrupt Acknowledge register (ITXINTACK).
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| PDI1394L41BE | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:1394 content protection AV link layer controller |
| PDI1394P11 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:3-port physical layer interface |
| PDI1394P11A | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:3-port physical layer interface |
| PDI1394P11ABD | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:3-port physical layer interface |
| PDI1394P11ABD-S | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Transceiver |
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