參數(shù)資料
型號(hào): PDI1394L41
廠(chǎng)商: NXP Semiconductors N.V.
英文描述: Content Protection AV Link Layer(內(nèi)容可保護(hù)的AV鏈接層控制器)
中文描述: 影音內(nèi)容保護(hù)鏈路層(內(nèi)容可保護(hù)的視聽(tīng)鏈接層控制器)
文件頁(yè)數(shù): 73/81頁(yè)
文件大?。?/td> 303K
代理商: PDI1394L41
Philips Semiconductors
Preliminary specification
PDI1394L41
1394 content protection AV link layer controller
2000 Apr 15
70
14.0
DC ELECTRICAL CHARACTERISTICS
Table 9.
SYMBOL
V
IL
V
IH
DC Electrical Characteristics
PARAMETER
LOW input voltage
HIGH input voltage
Input threshold, rising edge
MIN
MAX
0.8
UNIT
V
V
NOTE
Pin categories 1, 2, 3
Pin categories 1, 2, 3
Pin categories 6, 8
LOW to HIGH transition
Pin categories 6, 8
HIGH to LOW transition
Pin category 9
LOW to HIGH transition
Pin category 9
HIGH to LOW transition
Pin category 1
I
OH
= 4mA
I
OL
= 4mA
Pin category 1
I
OH
= 4mA
I
OL
= 4mA
Pin categories 4, 6, 7
I
OH
= 4mA
Pin categories 4, 5, 6, 7
I
OL
= 4mA
Pin categories 2, 3
V
I
= 5.5V or 0V
Pin category 8
V
I
= 5.5V or 0V
Pin categories 1, 7
V
I
= 5.5V or 0V
Pin category 6
V
I
= 5.5V or 0V
Under idle conditions, the
maximum value is 10 mA
2.0
V
IT1
+
V
DD
/2 + 0.3
V
DD
/2 + 0.9
V
V
IT1
Input threshold, falling edge
V
DD
/2 – 0.9
V
DD
/2 – 0.3
V
V
IT2
+
Input threshold, rising edge
.42 V
DD
+ 0.9
V
V
IT2
Input threshold, falling edge
.42 V
DD
+ 0.3
V
V
OH1
HIGH output voltage
2.4
V
V
OL1
LOW output voltage
0.4
V
V
OH2
HIGH output voltage
2.4
V
V
OL2
LOW output voltage
0.4
V
I
L
Input leakage current
In ut leakage current
±
1
A
200
A
I
OZ
3-State output current
3-State out ut current
±
5
A
200
A
I
DD
Supply current
150
mA
14.1
Pin Categories
Table 10.
Category 1:
Input/Output
Pin Categories
Category 2:
Input
Category 3:
Input
Category 4:
Output
Category 5:
Output
Category 6:
Input/Output
Category 7:
Category 8:
Category 9:
HIF AD[7:0]
HIF A[8]
RESETN
CYCLEOUT
HIF INTN
PHY D[0:7]
LREQ
SCLK
LNKON
AVxSYNC
HIF CSN
CYCLEIN
CLK50
PHY
CTL[0:1]
ISON
AV2ERR0
HIF WRN
HIF WAIT
AV2ERR1
HIF MUX
LPS
AVxVALID
AVxENDPCK
HIF16BIT
AVxEMI
AV xD[7:0]
HIF ALE
1394MODE
AV1ERR0
AVxCLK
HIF RDN
AV1ERR1
AVxFSYNC
HIF D[15:8]
HIF A[7:0]
AVxSYSYNC
AVxSY
AVxREADY
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