參數(shù)資料
型號(hào)： PDI1394L41
廠商： NXP Semiconductors N.V.
英文描述： Content Protection AV Link Layer(內(nèi)容可保護(hù)的AV鏈接層控制器)
中文描述： 影音內(nèi)容保護(hù)鏈路層（內(nèi)容可保護(hù)的視聽(tīng)鏈接層控制器）
文件頁(yè)數(shù)： 61/81頁(yè)
文件大?。?/td> 303K
代理商： PDI1394L41
Philips Semiconductors
Preliminary specification
PDI1394L41
1394 content protection AV link layer controller
2000 Apr 15
58
13.2.11
Isochronous Receiver Interrupt Acknowledge (IRXINTACK) – Base Address: 0x04C
29 28 272625 24 23 22 212019 18 1716 15 1413 12 11 10 9 8 7 6 5 4 3 2 1 0
C
R
S
C
I
F
S
I
SV01025
3130
I
I
I
I
I
S
Reset Value 0x00000000
Bit 14:
R/W
SYTOVF: SYT FIFO overflow. The isochronous receiver’s SYT field FIFO has overflowed and has been
automatically reset and cleared. This interrupt alerts the host controller that up to 7 AVFSYNC pulses may be
missing due to an SYT field reception error.
IRO/E: Odd/even key change. Software should write in the new set of keys to the cipher.
IREMI:
This bit indicates when there has been a change in the received EMI bit values (bits 2 and 3 of register
0x054). This interrupt, when = 1, indicates that a changed EMI field has been received.
IR100LFT: Interrupt when receiver queue reaches 100 quadlets from full.
IR256LFT: Interrupt when receiver queue reaches 256 quadlets from full.
IR512LFT: Interrupt when receiver queue reaches 512 quadlets from full. This bit is disabled if 0.5K Byte buffer size
is set.
IRXFULL: Isochronous data memory bank has become full. this is a fatal error, the recommended action is to reset
and re-initialize the receiver.
IRXEMPTY: Isochronous data memory bank has become empty.
FSYNC: Pulse at fsync output.
SEQERR: Sequence error of data blocks.
CRCERR: CRC error in bus packet.
CIPTAGFLT: Faulty CIP header tag (E,F bits). i.e.: The CIP header did not meet the standard and the whole packet
is ignored.
RCVBP: Bus packet processing complete.
SQOV: Status queue overflow. This is a fatal error, the recommended action is to reset and re-initialize the receiver.
Bit 13:
Bit 12:
R/W
R/W
Bit 10:
Bit 9:
Bit 8:
R/W
R/W
R/W
Bit 7:
R/W
Bit 6:
Bit 5:
Bit 4:
Bit 3:
Bit 2:
R/W
R/W
R/W
R/W
R/W
Bit 1:
Bit 0:
R/W
R/W
13.2.12
Interrupt enable bits for AV Receiver.
Isochronous Receiver Interrupt Enable (IRXINTE) – Base Address: 0x050
29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7
6
5 4 3
2 1
0
E
E
E
E
E
E
E
E
31 30
SV01026
E
E
E
E
E
E
Reset Value 0x00000000
Bit 13..0 are interrupt enable bits for the Isochronous Receiver Interrupt Acknowledge (IRXINTACK).
相關(guān)PDF資料
PDF描述
PDI1394P21 3-port Physical Layer Interface(三端口物理層接口)
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PDI1394L41BE 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:1394 content protection AV link layer controller
PDI1394P11 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:3-port physical layer interface
PDI1394P11A 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:3-port physical layer interface
PDI1394P11ABD 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:3-port physical layer interface
PDI1394P11ABD-S 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Transceiver
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