參數(shù)資料
型號(hào)： PDI1394L41
廠商： NXP Semiconductors N.V.
英文描述： Content Protection AV Link Layer(內(nèi)容可保護(hù)的AV鏈接層控制器)
中文描述： 影音內(nèi)容保護(hù)鏈路層（內(nèi)容可保護(hù)的視聽(tīng)鏈接層控制器）
文件頁(yè)數(shù)： 62/81頁(yè)
文件大?。?/td> 303K
代理商： PDI1394L41
Philips Semiconductors
Preliminary specification
PDI1394L41
1394 content protection AV link layer controller
2000 Apr 15
59
13.2.13
Isochronous Receiver Control Register (IRXCTL) – Base Address: 0x054
29 28 272625 24 23 22 212019 18 1716 15 1413 12 11 10 9 8 7 6 5 4 3 2 1 0
TAG
CHANNEL
ERR
SV01041
SPD
3130
O
E
D
S
Reset Value 0x00000000
Bit 20:
R/W
De-cipher Enable: When set the internal M6 cipher will decrypt the application packets with the associated key in the
M6 indirect address space for the given EMI value assigned. When the EMI value changes, the cipher will
automatically change the key on the next application packet. Changes to the ODD/EVEN bit (bit 1) will automatically
swap the odd/even key in the cipher.
Note:
the maximum average data rate for the M6 cipher is 60 Mbps.
SPD: Speed of last received isochronous packet (S100 .. S400).
00 =
100 Mbps
01 =
200 Mbps
10 =
400 Mbps
11 =
Reserved
TAG: Isochronous tag value (must match) for AV format, ‘01’ for IEC 61883 International Standard data.
CHAN: Channel number to receive isochronous data.
ERR: Error code for last received isochronous AV packet.
Encryption Mode Indication: This bit pattern specifies the level of copy control information for the data stream. The
field only has significance when the internal cipher is enabled (DECPHR_EN = 1). The value of these bits is stored
and accompanies the received packet through the IRx FIFO. At a later time, when the first byte of the accompanied
packet is presented at the receiving AV port, that EMI value is also presented.
Note:
The EMI value in this register
is indicative
only
of the EMI value of the packet which is being received from the bus. The EMI value at the AV port
may differ due to aging as it progresses through the IRx FIFO. See the “5C Digital Transmission Content Protection
Specification, Volume 1”for more details about EMI values.
ODD/EVEN: Used for encryption key (0= even, 1 = odd). When the internal M6 decipher is enabled
(DECPHR_EN = 1), changes to this bit field will cause the cipher to swap its odd/even key. An interrupt will be
generated, ‘Odd/even’ in the IRXINTACK register to allow firmware to update key sets. See the “5C Digital
Transmission Content Protection Specification, Volume 1”for more details about odd/even values.
SY: Sync code to insert in SY field of isochronous bus packet header. This bit reflects the value of the SY bit
received from the isochronous header and is synchronized in the receiver FIFO with the data payload that was
associated with it.
Note:
The SY value in this register is indicative
only
of the EMI packet which is being received
from the bus. The SY value at the AV port may differ due to aging as it progresses through the IRx FIFO.
Bit 17..16:
R
Bit 15..14:
Bit 13..8:
Bit 7..4:
Bit 3..2:
R/W
R/W
R
R
Bit 1:
R
Bit 0:
R
Table 7.
Error Codes
Code
Name
Meaning
0000
reserved
0001
ack_complete
The node has successfully accepted the packet. If the packet was a request subaction, the destination node has
successfully completed the transaction and no response subaction shall follow.
0010
through
1100
reserved
1101
ack_data_error
The node could not accept the block packet because the data field failed the CRC check, or because the length
of the data block payload did not match the length contained in the dataLength field. this code shall not be
returned for any packet that does not have a data block payload.
1110
and
1111
reserved
相關(guān)PDF資料
PDF描述
PDI1394P21 3-port Physical Layer Interface(三端口物理層接口)
PDI1394P22 3-port Physical Layer Interface(三端口物理層接口)
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PDI1394L41BE 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:1394 content protection AV link layer controller
PDI1394P11 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:3-port physical layer interface
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PDI1394P11ABD 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:3-port physical layer interface
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