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參數(shù)資料
| 型號(hào)： | PEB2245N |
| 廠商： | SIEMENS AG |
| 英文描述： | ?Multipoint Switching and Conferencing Unit - Attenuation? |
| 中文描述： | ？多點(diǎn)交換和會(huì)議股-衰減？ |
| 文件頁(yè)數(shù)： | 10/70頁(yè) |
| 文件大?。?/td> | 1021K |
| 代理商： | PEB2245N |
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PEB 2245
Semiconductor Group
10
1.3
Pin Definitions and Functions
Pin No.
Symbol
Input (I)
Output (O)
Function
1
V
SS
INT
I
Ground (0 V)
6
OD
Interrupt Request:
The signal is activated when a
conference overflow is detected. The microprocessor
may determine the specific conference in overflow by
reading the conference status register (CST). The
interrupt is maskable. INT is an open drain output, thus a
“wired-or” combination of interrupt request outputs of
several MUSACs is possible. (A pull up resistor is
necessary).
3
SP
I
Synchronization Pulse:
The MUSAC is synchronized
relative to the PCM system via this line.
4
7
9
11
13
14
15
16
17
18
19
IN1
IN5
IN9
IN13
IN14
IN15
IN10
IN11
IN6
IN7
IN2
I
I
I
I
I
I
I
I
I
I
I
PCM-Input Ports:
Serial data is received at these lines
at standard TTL levels.
5
8
10
12
IN0/TSC0
IN4/TSC1
IN8/TSC2
IN12/TSC3
I/O
I/O
I/O
I/O
PCM-Input Port / Tristate Control:
In standard
configuration these pins are used as input lines, in
primary access configuration they supply control signals
for external devices.
20
IN3/DCL
I/O
PCM-Input Port / Data Clock:
In standard configuration
IN3 is the PCM input line 3, in primary access
configuration it provides a 2048-kHz data clock for the
synchronous interface.
21
28
A0
A1
I
I
Address for Direct Register Access:
These pins are
only active if a demultiplexed
μ
P-interface mode is
selected.
22
CS
I
Chip Select:
A low level selects the MUSAC for a
register access operation.
Supply Voltage:
5 V
±
5 %.
23
V
DD
I
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| PEB2245-N | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:multipoint switching and conferencing unit (musac) |
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| PEB22522 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:MULTI BIT RATE INTEGRATED CIRCUIT |
| PEB22522F | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:?Multi Bit-rate Integrated Circuit (MuBIC-2)? |
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