參數(shù)資料
型號： PEB2245N
廠商： SIEMENS AG
英文描述： ?Multipoint Switching and Conferencing Unit - Attenuation?
中文描述： ？多點交換和會議股-衰減？
文件頁數(shù)： 28/70頁
文件大?。?/td> 1021K
代理商： PEB2245N
PEB 2245
Semiconductor Group
28
Figure 13
SYP Duration for N = 2
Primary Access Configuration
A logical 0 in the CFS bit of the configuration register selects the PEB 2245 for primary access
applications. In this case the MUSAC is an interface device connecting a standard PCM interface
(system interface) with another PCM-interface e.g. an intermediate interface for connections to
primary loops (synchronous interface). For both a serial interface is provided.
The synchronous 2048-kbit/s interface consists of four input and four output lines with a bit rate of
2048-kbit/s. This interface can be used to connect the PEB 2245 to up to four primary trunk lines via
coding/decoding devices with frame alignment function (e.g. PEB 2035 ACFA) and line transceivers
with clock and data recovery (e.g. PEB 2235 IPAT) and to signalling processors (e.g. the
SAB 82520 HSCC).
The system interface is not confined to one data rate but can operate at the full choice of the
PEB 2245 data rates: 2048, 4096 and 8192 kbit/s. A clock shift in a range of 7 1/2 clock steps with
half clock step resolution may be programmed independently for inputs and outputs.
The frame for all input- and output lines starts with the rising edge of the SP signal.
In the primary access mode the signals TSC0, TSC1, TSC2 and TSC3 indicate when the
associated system interface output is valid. The signal DCL supplies a 2-MHz clock which can be
used for other devices at the synchronous interface, e.g. the High Level Serial Communication
Controller HSCC (SAB 82520).
In the primary access configuration only those modes which support at least 4 input and 4 output
lines at 2048-kbit/s can be used. These are the modes MI1, MI0, MO1, MO0 = 0
H
, A
H
, F
H
(
see
table 7
). Programming the CM in the primary access configuration is described in
tables 8, 11 and
12
. The least significant 2 bits of the data byte and the least significant bit of the address byte
determine the type of interface, the more significant bits define the logical line number and time-slot
number.
According to
figure 14
in the primary access configuration the connection memory is usually
programmed to switch the system and synchronous interface inputs to the synchronous and system
interface outputs, respectively. However, it is also possible to connect the system interface inputs
to the system interface outputs as well as the synchronous interface inputs to the synchronous
interface outputs. This connection possibility allows for test loops at the system and the
synchronous interfaces.
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PDF描述
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PEB2245-N 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:multipoint switching and conferencing unit (musac)
PEB22504 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:Quad Line Interface Unit for E1⁄T1⁄J1 QuadLIU
PEB22504HT-V11 功能描述:IC INTERFACE QUAD 100-TQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 專用 系列:* 標準包裝:3,000 系列:- 應(yīng)用:PDA，便攜式音頻/視頻，智能電話 接口:I²C，2 線串口 電源電壓:1.65 V ~ 3.6 V 封裝/外殼:24-WQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:24-QFN 裸露焊盤（4x4） 包裝:帶卷 (TR) 安裝類型:表面貼裝 產(chǎn)品目錄頁面:1015 (CN2011-ZH PDF) 其它名稱:296-25223-2
PEB22522 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:MULTI BIT RATE INTEGRATED CIRCUIT
PEB22522F 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:?Multi Bit-rate Integrated Circuit (MuBIC-2)?
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