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參數(shù)資料
| 型號(hào)： | PEB2245N |
| 廠商： | SIEMENS AG |
| 英文描述： | ?Multipoint Switching and Conferencing Unit - Attenuation? |
| 中文描述： | ？多點(diǎn)交換和會(huì)議股-衰減？ |
| 文件頁數(shù)： | 61/70頁 |
| 文件大?。?/td> | 1021K |
| 代理商： | PEB2245N |
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PEB 2245
Semiconductor Group
61
Meaning of Bits when Writing to the CCM and CM in Conference Mode
A write access to indirect registers and to the CM and CCM is performed by writing a 3-byte
sequence to the IAR register:
1st writing:
2nd writing:
3rd writing:
IAR = control byte
IAR = data byte
IAR = address byte
Before each indirect access, it should be verified that the STA:Z (incomplete instruction) and B bits
(CM reset) are both set to logical 0. The Z bit is set to logical 1 after the first IAR access and reset
to logical 0 at the latest 900 ns after the third access. An incomplete access sequence can be
aborted by setting the MOD:RI bit to 1.
Standard configuration and 2048-Mbit/s input and output modes are assumed for the encoding of
time-slots and lines given below (for other configurations, refer to the MUSAC data sheet):
INV
PCM data is
Inverted
(1) or not (0)
ITS4 … 0
Input Time-Slot
number (0 – 31)
IL3 … 0
Input Line
number (0 – 15)
CCA5 … 0
Conference Control Address
(0 – 63)
NOI1 … 0
Noise
suppression threshold: 00 = no noise suppression
01 = 5th step, first segment
10 = 9th step, first segment
11 = 16th step, first segment
IAT1 … 0
Input Attenuation:
00 = 0 dB
01 = 3 dB
10 = 6 dB
11 = 9 dB
OAT
Output Attenuation
(0 = 0 dB, 1 = 3 dB)
CNR4 … 0
Conference Number
0 … 20 valid conference number
31
21 … 30 not used
no conference assigned
CCM 1st access:
0
1
1
0
0
0
INV
ITS4
control byte
ITS3
ITS2
ITS1
ITS0
IL3
IL2
IL1
IL0
data byte
0
0
CCA5
CCA4
CCA3
CCA2
CCA1
CCA0
address byte
CCM 2nd access:
1
0
1
0
0
0
NOI1
NOI0
control byte
IAT1
IAT0
OAT
CNR4
CNR3
CNR2
CNR1
CNR0
data byte
0
0
CCA5
CCA4
CCA3
CCA2
CCA1
CCA0
address byte
Note that the CCM must always be written in the sequence: 1st access, 2nd access!
CM access:
0
0
1
0
0
CONF=1
VAL
0
control byte
0
0
CCA5
CCA4
CCA3
CCA2
CCA1
CCA0
data byte
OTS4
OTS3
OTS2
OTS1
OTS0
OL2
OL1
OL0
address byte
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PEB2245-N | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:multipoint switching and conferencing unit (musac) |
| PEB22504 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:Quad Line Interface Unit for E1⁄T1⁄J1 QuadLIU |
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| PEB22522 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:MULTI BIT RATE INTEGRATED CIRCUIT |
| PEB22522F | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:?Multi Bit-rate Integrated Circuit (MuBIC-2)? |
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