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參數(shù)資料
| 型號： | PEB2245N |
| 廠商： | SIEMENS AG |
| 英文描述： | ?Multipoint Switching and Conferencing Unit - Attenuation? |
| 中文描述： | ？多點交換和會議股-衰減？ |
| 文件頁數(shù)： | 27/70頁 |
| 文件大?。?/td> | 1021K |
| 代理商： | PEB2245N |
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PEB 2245
Semiconductor Group
27
Configuration Type
The MUSAC works either in the standard configuration for usual switching applications or in the
primary access configuration. In these both configurations the conference and multipoint switching
capability can be used.
Standard Configuration
A logical 1 in the CFS bit of the configuration register sets the PEB 2245 in standard mode (default
after power up). All modes from
table 7
can be used. It has to be ensured that the data rate is not
higher than the selected device clock (4096 or 8192 kHz).
In this application 512 channels per frame are written into the speech memory. Each one of them
can be connected to any output channel.
According to
table 8
and
table 10
and depending on the selected mode the least significant bits of
the connection memory address and data contain the logical pin numbers, the most significant bits
the time-slot number of the output and input channels.
The following example explains the programming sequence.
Time-slot 7 of the incoming 8192-kbit/s input line IN 14 shall be connected to time-slot 6 of the
output line OUT 5 of an 2048-kbit/s system. According to
table 8
in 8192-kbit/s systems the input
line IN 14 is the logical input line 2. Output line number and logical output number are identical to
one another.
Therefore the following byte sequence on the address data bus has to be used to program the CM
properly (
see table 10
).
00100000
00011110
00110101
(Control Byte)
(Data Byte)
(Address Byte)
The frame, for all input channels, starts with the rising edge of the SP signal. The frame for all output
channels begins two
t
CP8
(with 8192-kHz device clock) or one
t
CP4
period (4096-kHz device clock)
before the falling SP edge. The period of time between the rising and falling edge of the SP pulse
should be
t
SPH
=
(2 + N
×
4)
t
CP8
(0
≤
N
≤
255)
=
(1 + N
×
2)
t
CP4
N is an user defined integer. By varying N,
t
SPH
can be varied in 2048-kHz clock period steps. For
an example using N = 2 refer to
figure 13
.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PEB2245-N | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:multipoint switching and conferencing unit (musac) |
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| PEB22522 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:MULTI BIT RATE INTEGRATED CIRCUIT |
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