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參數(shù)資料
| 型號： | PI7C9X20404SLCFDE |
| 廠商： | Pericom |
| 文件頁數(shù)： | 23/77頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC PCIE PACKET SWITCH 128LQFP |
| 標準包裝： | 90 |
| 系列： | SlimLine™ |
| 應用： | 封裝開關，4 端口/4 線道 |
| 接口： | PCI Express |
| 封裝/外殼： | 128-LQFP 裸露焊盤 |
| 供應商設備封裝： | 128-LQFP（14x14） |
| 包裝： | 托盤 |
| 安裝類型： | 表面貼裝 |
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PI7C9X20404SL
4Port-4Lane PCI Express Switch
SlimLine
TM Family
Datasheet
Page 3 of 77
July 2009 – Revision 1.2
Pericom Semiconductor
REVISION HISTORY
Date
Revision Number
Description
9/10/07
0.1
Drafted Preliminary Datasheet
Updated Chapter 1 Features
Updated Chapter 3: Pin Assignment
Updated Chapter 4: Removed Hot Plug and Virtual Channel related pins
Updated Chapter 7: Removed and Updated Virtual Channel related registers
9/14/07
0.2
Removed Table 9.3 JTAG Register
10/08/07
0.3
Corrected Chapter 3 Pin Description (DTX’s and DEQ’s default values)
Updated Chapter 3.5 JTAG Signals description
Updated Chapter 7.2.53 bit
Remove VDDP, VDDAUX from Chapter 10 Power Management and
Chapter 11.1 Absolute Maximum Ratings
Revised Chapter 10 Power Management
Corrected Chapter 3 Pin Description (PERP/PERN, PETP/PETN,
WAKEUP_L, SLOT_IMP, SLOTCLK, EEPD, SMBDATA, SCAN_EN,
PORTACT to PORTERR, DTX, DEQ)
Updated 5.1 Physical Layer Circuit and Chapter 5.6 Queue
Updated Disclaimer
Updated Chapter 13 Ordering Information
Corrected Chapter 3 Pin Description (DWNRST_L, SLOT_IMP,
PORTERR)
Corrected Virtual Channel 1 related information in Chapter 2 General
Description and Chapter 5 (5.5 TC/VC Mapping, 5.6 Queue, 5.7 Transaction
Ordering, 5.9 VC Arbitration removed)
Removed Virtual Channel 1 related information in Chapter 2 General
Description and Chapter 5 (5.5 TC/VC Mapping, 5.6 Queue, 5.7 Transaction
Ordering, 5.9 VC Arbitration removed)
10/31/07
0.4
Updated Footer
Updated Chapter 5.8 Port Arbitration
Updated Chapter 6.1.3 EEPROM Space Address Map
Added 6.2 SMBus
Fixed Chapter 6.1.4 Mapping EEPROM table format
Updated Chapter 7 Registers (Offset 08h, 100h, 140h to 1BCh, B0h bit 31)
1/31/08
0.5
Updated Chapter 6 EEPROM (50h, 52h, 54h, 56h Reserved)
Updated 7.2.91 [7:0] (Removed VC1 description)
Corrected Chapter 5 Functional Description (multiple virtual channels)
Updated Chapter 6 EEPROM (0Ch)
Modified Chapter 7 Registers (7.2.2 Device ID Register, 7.2.50 Replay
Time-Out Counter, 7.2.52 Bit[14:15] Switch Operation Mode, 7.2.64 PCI
Express Capability Bit[24], 7.2.70 Link Status Bit[28], 7.2.99 Power
Budgeting Data, 7.2.100 Power Budget Capability)
Updated 9.5 JTAG Boundary Scan Register Order
2/20/08
0.6
Updated Chapter 3.5 Power Pins (VDDC, VDDA, VDDAUX, VTT)
Updated Chapter 6 EEPROM (A0h, A2h, A4h, A6h)
Updated Chapter 1 Features (Power Dissipation)
Updated Chapter 11.1 AC Specification (VDDAUX)
Updated Chapter 11.2 DC Specification (Power Consumption, VDDAUX)
Updated Chapter 10 Power Management (VDDAUX)
5/28/08
0.7
Updated 1 Features (typical latency, removed peer-to-peer switching, power
consumption)
Updated Chapter 3.1 PCI Express Interface Signals (REFCLKP, REFCLKN,
PRSNT)
Updated Chapter 4.1 PIN List of 128-PIN LQFP (PRSNT)
Modified 5.1 Physical Layer Circuit
Updated Chapter 6.1.3 EEPROM Space Address Map (10h to 16h, 50h to
56h)
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| PI7C9X20404SLCFDEX | 功能描述:外圍驅(qū)動器與原件 - PCI 4port 4lane PCIe Packet Switch RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| PI7C9X20505GPBNDE | 功能描述:外圍驅(qū)動器與原件 - PCI 5port 5lane PCIe PacketSwitch RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| PI7C9X20508GPANDE | 制造商:Pericom Semiconductor Corporation 功能描述:5-PORT, 8-LANE, GREENPACKET- PCIE PACKET SWITCH - Rail/Tube |
| PI7C9X20508GPBEVB | 制造商:Pericom Semiconductor Corporation 功能描述:EVAL BOARD - Boxed Product (Development Kits) |
| PI7C9X20508GPBNDE | 功能描述:外圍驅(qū)動器與原件 - PCI 5port 8lane PCIe PacketSwitch RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
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