參數資料
| 型號： | PI7C9X20404SLCFDE |
| 廠商： | Pericom |
| 文件頁數： | 54/77頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC PCIE PACKET SWITCH 128LQFP |
| 標準包裝： | 90 |
| 系列： | SlimLine™ |
| 應用： | 封裝開關，4 端口/4 線道 |
| 接口： | PCI Express |
| 封裝/外殼： | 128-LQFP 裸露焊盤 |
| 供應商設備封裝： | 128-LQFP（14x14） |
| 包裝： | 托盤 |
| 安裝類型： | 表面貼裝 |
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PI7C9X20404SL
4Port-4Lane PCI Express Switch
SlimLine
TM Family
Datasheet
Page 58 of 77
July 2009 – Revision 1.2
Pericom Semiconductor
7.2.76
PCI EXPRESS ADVANCED ERROR REPORTING CAPABILITY ID
REGISTER – OFFSET 100h
BIT
FUNCTION
TYPE
DESCRIPTION
15:0
Extended
Capabilities ID
RO
Read as 0001h to indicate that these are PCI express extended capability
registers for advance error reporting.
7.2.77
CAPABILITY VERSION – OFFSET 100h
BIT
FUNCTION
TYPE
DESCRIPTION
19:16
Capability Version
RO
Read as 1h. Indicates PCI-SIG defined PCI Express capability structure
version number.
Reset to 1h.
7.2.78
NEXT ITEM POINTER REGISTER – OFFSET 100h
BIT
FUNCTION
TYPE
DESCRIPTION
31:20
Next Capability
Offset
RO
Pointer points to the PCI Express Extended VC capability register (140h).
Reset to 140h (upstream port).
Reset to 20Ch (downstream port).
7.2.79
UNCORRECTABLE ERROR STATUS REGISTER – OFFSET 104h
BIT
FUNCTION
TYPE
DESCRIPTION
0
Training Error Status
RW1CS
When set, indicates that the Training Error event has occurred.
Reset to 0b.
3:1
Reserved
RO
Reset to 000b.
4
Data Link Protocol
Error Status
RW1CS
When set, indicates that the Data Link Protocol Error event has occurred.
Reset to 0b.
11:5
Reserved
RO
Reset to 0.
12
Poisoned TLP Status
RW1CS
When set, indicates that a Poisoned TLP has been received or generated.
Reset to 0b.
13
Flow Control
Protocol Error Status
RW1CS
When set, indicates that the Flow Control Protocol Error event has occurred.
Reset to 0b.
14
Completion Timeout
Status
RW1CS
When set, indicates that the Completion Timeout event has occurred.
Reset to 0b.
15
Completer Abort
Status
RW1CS
When set, indicates that the Completer Abort event has occurred.
Reset to 0b.
16
Unexpected
Completion Status
RW1CS
When set, indicates that the Unexpected Completion event has occurred.
Reset to 0b.
17
Receiver Overflow
Status
RW1CS
When set, indicates that the Receiver Overflow event has occurred.
Reset to 0b.
18
Malformed TLP
Status
RW1CS
When set, indicates that a Malformed TLP has been received.
Reset to 0b.
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