參數(shù)資料
型號: PSB7110
廠商: SIEMENS AG
英文描述: Enhanced ISDN Data Access Controller ISAR
中文描述: 增強綜合業(yè)務數(shù)字網(wǎng)的數(shù)據(jù)接入控制器專家組
文件頁數(shù): 27/164頁
文件大小: 1173K
代理商: PSB7110
_________________________________________________PSB 7110
Siemens Aktiengesellschaft
Page 27
2.2
Buffer Config
uration
The mailbox represents the common host interface for all data paths, which are the two B-Channel paths and the
test diagnostics path. For each data path the read and write direction is buffered with a FIFO. The FIFO buffers
reside in external memory.
Write
Buffer
Read
Buffer
Mailbox
Read-/Write
Buffer
Host
(7110_26)
Figure 14 Buffer Configuration
Buffer control
After the host has written a message to the write buffer, the ISAR will issue a buffer available interrupt to the host if
there is still enough free buffer space for another message of the programmed length (i.e. another message may be
written to the mailbox). If the host enters messages into the mailbox which exceed the configured message length,
the FIFO buffer may overflow and data might be lost.
If there is no free space available, the host must not write new data to the mailbox. In this case the ISAR will release a
buffer overflow indication and data in the FIFO buffers will not be overwritten, i.e. new data get lost.
The buffers can be set a priority to determine the sequence of service if several read buffers request for mailbox
service simultaneously.
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