參數(shù)資料
型號: PSB7110
廠商: SIEMENS AG
英文描述: Enhanced ISDN Data Access Controller ISAR
中文描述: 增強(qiáng)綜合業(yè)務(wù)數(shù)字網(wǎng)的數(shù)據(jù)接入控制器專家組
文件頁數(shù): 35/164頁
文件大?。?/td> 1173K
代理商: PSB7110
_________________________________________________PSB 7110
Siemens Aktiengesellschaft
Page 35
When a message is written to the mailbox, the ISAR will transfer the whole message to the
destination buffer which is indicated in the host interrupt status byte (HIS). During that time another
message must not be entered by the host, however due to the mailbox structure, the message
transfer is performed rather fast and will not delay any host access.
Therefore, before any access to the mailbox is done, the host should read the host interrupt
acknowledge bit (HIA), to verify that the registers are available again (HIA=0) and a new message
may be written to the mailbox.
The control registers (CTRL MSB and LSB) should be written first, where the CTRL LSB contains the
total number of bytes which will be entered to the mailbox.
Before any data is written to the mailbox (address 4Ch), the write pointer (address 4Ah) must be reset
to 0. After a byte is written to the mailbox, the write address pointer is autoincremented and doesn't
need to be reprogrammed. This allows for fast access to the mailbox.
If there are successive messages with the same mailbox contents, the mailbox data does not need to
be written again, as this data is still available in the mailbox memory from the previous message. It
allows the host to flexibly reprogram the write pointer and its respective memory location only for
those mailbox contents which are different from the previous message.
Important note:
It is important to note that the HIS byte must be entered as the very last byte of the message as this
will indicate the new register and mailbox contents to the ISAR.
An access to the HIS register will terminate the message transfer and automatically set the HIA bit
which is reset again by the ISAR as soon as new data can be entered to the mailbox.
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