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參數(shù)資料
| 型號(hào)： | PSB7110 |
| 廠商： | SIEMENS AG |
| 英文描述： | Enhanced ISDN Data Access Controller ISAR |
| 中文描述： | 增強(qiáng)綜合業(yè)務(wù)數(shù)字網(wǎng)的數(shù)據(jù)接入控制器專(zhuān)家組 |
| 文件頁(yè)數(shù)： | 37/164頁(yè) |
| 文件大?。?/td> | 1173K |
| 代理商： | PSB7110 |
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_________________________________________________PSB 7110
Siemens Aktiengesellschaft
Page 37
If the ISAR has a message available in the mailbox to be read by the host, it will activate the INT-line.
To ensure, the interrupt line was not activated due to a hardware malfunction, the interrupt status bit
STA should be checked.
For the message transfer the ISAR interrupt status register (IIS) should be read first. It defines the
type of message and indicates the source where the message was initiated.
Then the CTRL MSB and LSB are read by the host, where the LSB indicates the total number of
bytes which are available in the mailbox .
Before data is read from the mailbox (address 4Ch), the read pointer (address 48h) must be reset to 0
to read the data starting with the first byte in sequence. For each read access to the mailbox the read
address pointer is autoincremented and does not need to be reprogrammed by the host.
This allows for fast access to the mailbox.
Important note:
It is important to note that the IIA bit must be reset as the very last register access of the message,
as this will indicate to the ISAR that the message has been completely read. The mailbox is
released and may be filled with new contents.
It is not necessary to read the mailbox if its content is not required by the host, e.g. if data is not valid.
The host can discard the contents by just writing the IIA bit as this will release the whole mailbox.
A response message is always initiated by the host releasing a request message to the ISAR (see
figure 18). The other messages are initiated by the state machine residing on the host side (messages
from host to ISAR) or residing on the ISAR (messages from ISAR to host).
Figure 18 Message directions
The ISAR releases an interrupt request to the host to indicate that a message must be read from the
mailbox. The host can mask the interrupt source (bit MSK=0) to avoid any interrupt state being
indicated to the host by activating the INT-line. However, the mask bit affects only the generation of
the interrupt, but not the interrupt status from being set (STA bit) which can be polled by the host.
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