參數(shù)資料
型號(hào)： SAK-TC1765T-L40EB
廠商： INFINEON TECHNOLOGIES AG
元件分類： 微控制器/微處理器
英文描述： 32-BIT, MROM, 40 MHz, MICROCONTROLLER, PBGA260
封裝： PLASTIC, LBGA-260
文件頁(yè)數(shù)： 60/88頁(yè)
文件大小： 1274K
代理商： SAK-TC1765T-L40EB
TC1765
Data Sheet
59
V1.2, 2002-12
Preliminary
1) Digital supply voltages applied to the TC1765 must be static regulated voltages which allow a typical voltage
swing of
±10%.
2) Voltage overshoot to 6.5 V is permissible, provided that the pulse duration is less than 100
s and the
cumulated summary of the pulses does not exceed 1 hour.
3) Voltage overshoot to 4 V is permissible, provided that the pulse duration is less than 100
s and the cumulated
summary of the pulses does not exceed 1 hour.
4) In order to minimize the danger of latch-up conditions, these 2.5 V V
DD power supply pins should be kept at
the same voltage level during normal operating mode. This condition is typically achieved by generating the
2.5 V power supplies from a single voltage source. The condition is also valid in normal operating mode if a
separate stand-by power supply
VDDSBRAM is used.
5) The minimum voltage at pin V
DDSBRAM during TC1765 power down mode is 1.8 V in order to keep the contents
of SBRAM valid. The core power supply
VDD must be below the standby power supply VDD < VDDSBRAM +
0.3 V.
6) The value of V
AREF is permitted to be within the range of VSSA - 0.05 V < VAREF < VDDM + 0.05 V. The value
specified for the total unadjusted error (TUE) is not guaranteed while the
VAREF is out of the specified range.
7) The value of V
AGND is permitted to be within the range of VSSA - 0.05 V < VAGND < VDDM + 0.05 V. The value
specified for the total unadjusted error (TUE) is not guaranteed while the
VAGND is out of the specified range.
8) Overload conditions occur if the standard operating conditions are exceeded, i.e. the voltage on any pin
exceeds the specified range (i.e.
VOV > VDD + 0.5 V or VOV < VSS - 0.5 V). The absolute sum of input overload
currents on all port pins may not exceed 50 mA. The supply voltage must remain within the specified limits.
9) Not 100% tested, guaranteed by design and characterization.
10) Applicable for analog inputs.
11) Applicable for digital inputs.
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