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參數(shù)資料
| 型號： | SAK-TC1765T-L40EB |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, MROM, 40 MHz, MICROCONTROLLER, PBGA260 |
| 封裝： | PLASTIC, LBGA-260 |
| 文件頁數(shù)： | 63/88頁 |
| 文件大小： | 1274K |
| 代理商： | SAK-TC1765T-L40EB |
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TC1765
Data Sheet
62
V1.2, 2002-12
Preliminary
Pin capacitance10)
(Digital I/O)
CIO CC –
10
pF
f = 1 MHz
TA = 25 °C
Class C Pins (
1) All Class A pins of the TC1765 are equipped with Low-Noise output drivers, which significantly improve the
device’s EMI performance. These Low-Noise drivers deliver their maximum current only until the respective
target output level is reached. After that the output current is reduced. This results in an increased impedance
of the driver, which attenuates electrical noise from the connected PCB tracks. The current, which is specified
in column “Test Conditions”, is delivered in any case.
2) This specification is not valid for outputs of GPIO lines, which are switched to open drain mode. In open drain
mode the output will float and the voltage results from the external circuitry.
3) Output drivers in high current mode.
4) Condition for output driver in dynamic current mode & low current mode – guaranteed by design
characterization.
5) Input characteristics can be switched between TTL and CMOS via register Px_PICON except for dedicated
pins which have CMOS input characteristics.
6) The maximum current can be drawn while the respective signal line remains inactive.
7) The two pull-up/pull-down current test conditions for V
OUT cover the curves as shown in Figure 20 and
Figure 21. All pull-up/pull-down currents are given as absolute values.
8) The minimum current must be drawn in order to drive the respective signal line active.
9) In case of Class B pins V
DDx = VDD. In case of Class A pins VDDx = VDDP.
10) Guaranteed by design characterization.
11) The test condition for Class A pins is: V
DDP = 4.5 to 5.25 V; for Class B pins: VDD = 2.3 to 2.75 V;
12) The max. peak-short-circuit current resp. max. peak-back-drive current is limited by max. 20 mA and the peak
period equivalent of 10 mA constant-short-circuit current resp. 10 mA constant-back-drive current. The integral
of
ISCBDpeak over the peak period is thus limited to 10 mA (provided: ISCBDpeak ≤ 20 mA).
13) To be defined for Class B pads.
14) Short-circuit or back-drive conditions during operation occur if the voltage on the respective pin exceeds the
specified operating range (i.e.
VSCBD > VDDP + 0.5 V or VSCBD < VSS - 0.5 V) or a short circuit condition occurs
on the respective pin. The absolute sum of input
ISCBD and IOV currents on all port pins must not exceed
100 mA at any time. The supply voltage (
VDDP and VSS) must remain within the specified limits. Under short-
circuit conditions the corresponding pin is not ready for use. In case of Class B pins
VDDx = VDD. In case of
Class A pins
VDDx = VDDP.
Input/Output DC-Characteristics (cont’d)
VSS = 0 V; TA = -40 °C to +125 °C;
Parameter1)
Symbol
Limit Values
Unit
Test Conditions
min.
max.
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