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參數(shù)資料
| 型號： | ST72T85A5Q6 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 8-BIT MCU FOR RDS WITH 48K ROM, 3K RAM, ADC, TWO TIMERS, TWO SPIs, I2C AND SCI INTERFACES |
| 中文描述： | 8位微控制器48,000鐵路發(fā)展策略光盤，3K內(nèi)存，ADC，兩個定時器，2個SPI，I2C和脊髓損傷接口 |
| 文件頁數(shù)： | 81/117頁 |
| 文件大小： | 748K |
| 代理商： | ST72T85A5Q6 |
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ST7285C
ST7 ADDRESSING MODES
(Cont’d)
Indexed (no offset, short, long)
The required data byte to do theoperation is found
by its memory address, which is defined by the un-
signed addition of an index register (X or Y) with
an offset which follows the op-code.
The indirect addressing mode consists of three
sub-modes:
Indexed (no offset):
There is no offset, (no extra byte after the op-
code), but only allows 00 - FF addressing space.
Indexed (short):
The offset is a byte, thus require only one byte af-
ter the op-code, but only allow 00 - 1FE address-
ing space.
Indexed (long):
The offset is a word, thus allowing 64Kb address-
ing space, but requires 2 bytes after the op-code.
Indirect (short, long):
The required data byte to do the operation is found
by its memory address, located in memory (point-
er).
The pointer address follows the op-code. The indi-
rect addressing mode consists of two sub-modes:
Indirect (short):
The pointer address is a byte, the pointer size is a
byte, thus allowing 00 - FF addressing space, and
requires 1 byte after the op-code.
Indirect (long):
The pointer address is a byte, the pointer size is a
word, thus allowing 64Kb addressing space, and
requires 1 byte after the op-code.
No Offset, Long and
Short Indexed Instruc.
LD
CP
AND, OR, XOR
Function
Load
Compare
Logical Operations
Arithmetic Additions/Sub-
stractions operations
Bit Compare
ADC, ADD, SUB, SBC
BCP
No Offset and Short
Indexed Inst. Only
CLR
INC, DEC
TNZ
CPL, NEG
BSET, BRES
BTJT, BTJF
SLL, SRL, SRA,RLC,
RRC
SWAP
CALL, JP
Function
Clear
Increment/Decrement
Test Negative or Zero
1 or 2 Complement
Bit Operations
Bit Test and Jump Operations
Shift and Rotate Operations
Swap Nibbles
Call or Jump subroutine
Available Long and Short
Indirect Instructions
LD
CP
AND, OR, XOR
Function
Load
Compare
Logical Operations
Arithmetic Additions/Sub-
stractions operations
Bit Compare
ADC, ADD, SUB, SBC
BCP
Short Indirect
Instructions Only
CLR
INC, DEC
TNZ
CPL, NEG
BSET, BRES
BTJT, BTJF
SLL, SRL, SRA,
RLC, RRC
SWAP
CALL, JP
Function
Clear
Increment/Decrement
Test Negative or Zero
1 or 2 Complement
Bit Operations
Bit Test and Jump Operations
Shift and Rotate Operations
Swap Nibbles
Call or Jump subroutine
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