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| 型號： | THS8210PFP |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP80 |
| 封裝： | POWER, PLASTIC, TQFP-80 |
| 文件頁數(shù)： | 13/73頁 |
| 文件大小： | 2053K |
| 代理商： | THS8210PFP |
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THS8200/8210
‘ALL-FORMAT’ OVERSAMPLED COMPONENT VIDEO/PC GRAPHICS D/A SYSTEM WITH
THREE 11 BIT DAC’S, CGMS DATA INSERTION AND 525P MACROVISION
TM COPY
PROTECTION
SLES032—6/18/02 3:33 PM
POST OFFICE BOX 655303 DALLAS TEXAS 77265
20
Copyright 2001 Texas Instruments Incorporated
PRODUCT PREVIEW information concerns products in the
formative or design phase of development. Characteristic data
and other specifications are design goals. Texas Instruments
reserves the right to change or discontinue these products
without notice.
The internal DLL (delay-locked loop) will generate the higher clock frequencies. The user should program the input
frequency range selection register ‘dll_freq_sel’ according to the frequency present on CLK_IN when using either
or both interpolation/oversampling stages.
The 4:2:2 to 4:4:4 stage is switched in or bypassed, depending on the setting of register ‘data_ifir12_bypass’
(interpolation only on chroma channels). This feature should only be used with YCbCr 4:2:2 input. THS8200/10 can
do color space conversion to RGB depending on the CSC setting. Register ‘dtg2_rgbmode_on’ should be set
corresponding to the color space representation of the DAC output.
The 2x oversampling stage is switched in or bypassed, depending on the setting of register ‘data_ifir35_bypass’.
The user should NOT enable the 2x oversampling stage when the CLK_IN frequency exceeds 80MHz, as is the
case for the higher PC graphics formats, and 1080P HDTV. In this case the DLL should be bypassed using register
‘vesa_clk’ to disable the 2x frequency generation. As explained in the detailed register map description for this
register, it is still possible to support 20-bit 4:2:2 input in this mode (e.g. for 1080P).
A second bypass mode operation exists for the DLL, enabled by register ‘dll_bypass’. When this bypass is active,
the CLKIN input is assumed to be 2x pixel frequency. This mode is meant only for test purposes as it does not
correspond to any mode in the ‘supported input formats’ table.
Color space conversion (CSC)
THS8200/10 contains a fully-programmable 3x3 multiply/add and 3x1 adder block that can be switched in for all
video formats up to a pixel clock frequency of 150MHz. Color space conversion is thus available for all DTV modes
incl. 1080P and VESA modes up to SXGA@75Hz (135MSPS). The operation is done after optional 4:2:2 to 4:4:4
conversion, and thus on the 1x pixel clock video data prior to optional 2x video oversampling. The CSC block can
be switched in or bypassed depending on the setting of register ‘csc_bypass’.
Each of the 9 floating point multiplier coefficients of the 3x3 multiply/add is represented as the combination of a 6-
bit signed binary integer part, and a 10 bit fractional part. The integer part is a signed magnitude representation
with the MSB as the sign bit. The fractional part is a magnitude representation, see example below.
The register nomenclature is: csc_<r,g,b><i,f>c<1,2,3> where:
<r,g,b> identifies which input channel is multiplied by this coefficient (‘r’ = red/Cr, ‘g’ = green/Y , ‘b’ = blue/Cb input)
<i,f> identifies the integer (‘i’) or fractional (‘f’) part of the coefficient
<1,2,3> identifies the output channel from the color space converter: ‘1’ = Yd/Gd, ‘2’ = Cb/Bd, ‘3’ = Cr,Rd
For the offset values, a value of 1/4
th of the desired digital offset needs to be programmed in the individual offset
register, so a typical offset of ‘512’ (offset over of the video range) requires programming a value of ‘128’ decimal
into the offset<1,2,3> registers, where again <1,2,3> defines the output channel affected, with similar convention as
shown above.
We will next show an example of how to program the CSC. This will also explain the numeric data formats.
CSC Configuration example: HDTV RGB to HDTV YCbCr
The formulas for RGB to YCbCr conversion are:
Yd = 0.2126*Rd + 0.7152*Gd + 0.0722*Bd
Cb = -0.1172*Rd – 0.3942*Gd + 0.5114*Bd + 512
Cr = 0.5114*Rd – 0.4646*Gd – 0.0468*Bd + 512
To program the red coefficient of channel 1 (Y) with the value of 0.2126 the following must be done:
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