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參數(shù)資料
| 型號： | THS8210PFP |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP80 |
| 封裝： | POWER, PLASTIC, TQFP-80 |
| 文件頁數(shù)： | 56/73頁 |
| 文件大?。?/td> | 2053K |
| 代理商： | THS8210PFP |
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THS8200/8210
‘ALL-FORMAT’ OVERSAMPLED COMPONENT VIDEO/PC GRAPHICS D/A SYSTEM WITH
THREE 11 BIT DAC’S, CGMS DATA INSERTION AND 525P MACROVISION
TM COPY
PROTECTION
SLES032—6/18/02 3:33 PM
POST OFFICE BOX 655303 DALLAS TEXAS 77265
6
Copyright 2001 Texas Instruments Incorporated
PRODUCT PREVIEW information concerns products in the
formative or design phase of development. Characteristic data
and other specifications are design goals. Texas Instruments
reserves the right to change or discontinue these products
without notice.
Overview of Functional Blocks
Data Manager (DMAN)
The Data MANager is the block that transforms the selected input video data format present on the chip’s input
bus(es) to an internal three 10-bit channel representation. Supported input formats include 10/8 bit ITU-R.BT-656
with embedded sync codes, 15/16 or 24/30 bit RGB with external sync, 20/16 bit SMPTE274M/296M with
embedded sync codes, as well as 20/16 bit YCbCr 4:2:2 with external sync. The data manager possibly includes
4:2:2 to 4:4:4 interpolation on the color difference channels. When a format with embedded sync is selected,
DMAN
also
extracts
H(Hsync),
V(Vsync),
F(FieldID)
identifiers
from
the
ITU-R.BT656
(SDTV)
or
SMPTE274M/296M (HDTV) data stream for internal synchronization of the DTG (see below). Alternatively, the
device synchronizes to HS_IN, VS_IN, FID inputs.
Interpolating Finite Impulse Response Filter (IFIR)
The Interpolating FIR is used to upsample the input data by 2X. In the THS8200/10 there are five IFIR’s. The first
two are only used when the input data is in 4:2:2 format for conversion to a 4:4:4 internal representation on both
color difference channels. The last three IFIR’s are used to upsample the internal data to the DAC’s on all three
channels in case 2x video interpolation is enabled. By 2x oversampling the video data, the requirements for the
analog reconstruction filter at the DAC outputs are relaxed so it can be built with less components, thereby also
improving the overall video frequency characteristic (less group delay variation).. All of the IFIR’s can be bypassed
or switched in by programming the appropriate I2C registers. The coefficients of all IFIR’s are fixed.
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